D. J. Bernstein
Computer hardware

SPARC speed

Sun's manuals page includes a microSPARC-IIep user's manual (PS), a SuperSPARC-II user's manual (PS), an UltraSPARC-I user's manual (PS), and an UltraSPARC-IIi user's manual (PS, aka 79578.ps).

Warning: The microSPARC-IIep has data-dependent FPU timings.

Each of the UltraSPARC manuals has a chapter on instruction grouping. Not particularly clear, and far too few examples, but better than nothing. Some important tidbits:

The store buffer has eight slots. Stores do not take precedence over loads until five store-buffer slots are full.

Cycle counters

The UltraSPARC has a 64-bit cycle counter, the %tick register. Unfortunately, this register is readable only by the kernel by default. Fortunately, the Solaris 8 kernel makes the register readable by user code.

Solaris also provides a gethrtime() library routine that returns the current time with nanosecond precision. This routine is based on a system call that reads the cycle counter.

Code measurement tools

Sun's INCAS is an UltraSPARC-I simulator. Sun claims that INCAS is available for free; unfortunately, its download page makes several unreasonable demands.

CPU identification

The UltraSPARC has a rdpr %ver instruction that copies the processor version into a register. Unfortunately, this instruction is usable only by the kernel by default.