; qhasm: int32 out

; qhasm: int32 r

; qhasm: int32 s

; qhasm: int32 m

; qhasm: int32 l

; qhasm: int32 constants

; qhasm: stack64 d0

; qhasm: stack64 d1

; qhasm: stack64 d2

; qhasm: stack64 d3

; qhasm: stack64 sr1low_stack

; qhasm: stack64 sr1high_stack

; qhasm: stack64 sr2low_stack

; qhasm: stack64 sr2high_stack

; qhasm: stack64 sr3low_stack

; qhasm: stack64 sr3high_stack

; qhasm: float64 scale

; qhasm: float64 alpha0

; qhasm: float64 alpha32

; qhasm: float64 alpha64

; qhasm: float64 alpha96

; qhasm: float64 alpha130

; qhasm: float64 h0

; qhasm: float64 h1

; qhasm: float64 h2

; qhasm: float64 h3

; qhasm: float64 h4

; qhasm: float64 h5

; qhasm: float64 h6

; qhasm: float64 h7

; qhasm: float64 y7

; qhasm: float64 y6

; qhasm: float64 y1

; qhasm: float64 y0

; qhasm: float64 y5

; qhasm: float64 y4

; qhasm: float64 x7

; qhasm: float64 x6

; qhasm: float64 x1

; qhasm: float64 x0

; qhasm: float64 y3

; qhasm: float64 y2

; qhasm: float64 r3low

; qhasm: float64 r0low

; qhasm: float64 r3high

; qhasm: float64 r0high

; qhasm: float64 sr1low

; qhasm: float64 x5

; qhasm: float64 r3lowx0

; qhasm: float64 sr1high

; qhasm: float64 x4

; qhasm: float64 r1low

; qhasm: float64 x3

; qhasm: float64 r3highx0

; qhasm: float64 r1high

; qhasm: float64 x2

; qhasm: float64 sr2low

; qhasm: float64 r0lowx0

; qhasm: float64 sr2high

; qhasm: float64 r2low

; qhasm: float64 r0highx0

; qhasm: float64 r2high

; qhasm: float64 sr3low

; qhasm: float64 r1lowx0

; qhasm: float64 sr3high

; qhasm: float64 r1highx0

; qhasm: float64 r2lowx0

; qhasm: float64 r2highx0

; qhasm: float64 z0

; qhasm: float64 z1

; qhasm: float64 z2

; qhasm: float64 z3

; qhasm: int32 r0

; qhasm: int32 r1

; qhasm: int32 r2

; qhasm: int32 r3

; qhasm: int32 m0

; qhasm: int32 m1

; qhasm: int32 m2

; qhasm: int32 m3

; qhasm: int32 m00

; qhasm: int32 m01

; qhasm: int32 m02

; qhasm: int32 m03

; qhasm: int32 m10

; qhasm: int32 m11

; qhasm: int32 m12

; qhasm: int32 m13

; qhasm: int32 m20

; qhasm: int32 m21

; qhasm: int32 m22

; qhasm: int32 m23

; qhasm: int32 m30

; qhasm: int32 m31

; qhasm: int32 m32

; qhasm: int32 m33

; qhasm: int32 lbelow2

; qhasm: int32 lbelow3

; qhasm: int32 lbelow4

; qhasm: int32 lbelow5

; qhasm: int32 lbelow6

; qhasm: int32 lbelow7

; qhasm: int32 lbelow8

; qhasm: int32 lbelow9

; qhasm: int32 lbelow10

; qhasm: int32 lbelow11

; qhasm: int32 lbelow12

; qhasm: int32 lbelow13

; qhasm: int32 lbelow14

; qhasm: int32 lbelow15

; qhasm: float64 alpham80

; qhasm: float64 alpham48

; qhasm: float64 alpham16

; qhasm: float64 alpha18

; qhasm: float64 alpha50

; qhasm: float64 alpha82

; qhasm: float64 alpha112

; qhasm: float64 offset0

; qhasm: float64 offset1

; qhasm: float64 offset2

; qhasm: float64 offset3

; qhasm: int32 s0

; qhasm: int32 s1

; qhasm: int32 s2

; qhasm: int32 s3

; qhasm: int32 f

; qhasm: int32 f0

; qhasm: int32 f1

; qhasm: int32 f2

; qhasm: int32 f3

; qhasm: int32 f4

; qhasm: int32 g0

; qhasm: int32 g1

; qhasm: int32 g2

; qhasm: int32 g3

; qhasm: int32 g4

; qhasm: int32 i11

; qhasm: int32 i12

; qhasm: int32 i13

; qhasm: int32 i14

; qhasm: int32 i15

; qhasm: int32 i16

; qhasm: int32 i17

; qhasm: int32 i18

; qhasm: int32 i19

; qhasm: int32 i20

; qhasm: int32 i21

; qhasm: int32 i22

; qhasm: int32 i23

; qhasm: int32 i24

; qhasm: int32 i25

; qhasm: int32 i26

; qhasm: int32 i27

; qhasm: int32 i28

; qhasm: int32 i29

; qhasm: caller i11

; qhasm: caller i12

; qhasm: caller i13

; qhasm: caller i14

; qhasm: caller i15

; qhasm: caller i16

; qhasm: caller i17

; qhasm: caller i18

; qhasm: caller i19

; qhasm: caller i20

; qhasm: caller i21

; qhasm: caller i22

; qhasm: caller i23

; qhasm: caller i24

; qhasm: caller i25

; qhasm: caller i26

; qhasm: caller i27

; qhasm: caller i28

; qhasm: caller i29

; qhasm: stack32 i11_stack

; qhasm: stack32 i12_stack

; qhasm: stack32 i13_stack

; qhasm: stack32 i14_stack

; qhasm: stack32 i15_stack

; qhasm: stack32 i16_stack

; qhasm: stack32 i17_stack

; qhasm: stack32 i18_stack

; qhasm: stack32 i19_stack

; qhasm: stack32 i20_stack

; qhasm: stack32 i21_stack

; qhasm: stack32 i22_stack

; qhasm: stack32 i23_stack

; qhasm: stack32 i24_stack

; qhasm: stack32 i25_stack

; qhasm: stack32 i26_stack

; qhasm: stack32 i27_stack

; qhasm: stack32 i28_stack

; qhasm: stack32 i29_stack

; qhasm: float64 j15

; qhasm: float64 j16

; qhasm: float64 j17

; qhasm: float64 j18

; qhasm: float64 j19

; qhasm: float64 j20

; qhasm: float64 j21

; qhasm: float64 j22

; qhasm: float64 j23

; qhasm: float64 j24

; qhasm: float64 j25

; qhasm: float64 j26

; qhasm: float64 j27

; qhasm: float64 j28

; qhasm: float64 j29

; qhasm: float64 j30

; qhasm: float64 j31

; qhasm: float64 j32

; qhasm: caller j15

; qhasm: caller j16

; qhasm: caller j17

; qhasm: caller j18

; qhasm: caller j19

; qhasm: caller j20

; qhasm: caller j21

; qhasm: caller j22

; qhasm: caller j23

; qhasm: caller j24

; qhasm: caller j25

; qhasm: caller j26

; qhasm: caller j27

; qhasm: caller j28

; qhasm: caller j29

; qhasm: caller j30

; qhasm: caller j31

; qhasm: caller j32

; qhasm: stack64 j15_stack

; qhasm: stack64 j16_stack

; qhasm: stack64 j17_stack

; qhasm: stack64 j18_stack

; qhasm: stack64 j19_stack

; qhasm: stack64 j20_stack

; qhasm: stack64 j21_stack

; qhasm: stack64 j22_stack

; qhasm: stack64 j23_stack

; qhasm: stack64 j24_stack

; qhasm: stack64 j25_stack

; qhasm: stack64 j26_stack

; qhasm: stack64 j27_stack

; qhasm: stack64 j28_stack

; qhasm: stack64 j29_stack

; qhasm: stack64 j30_stack

; qhasm: stack64 j31_stack

; qhasm: stack64 j32_stack

; qhasm: enter poly1305_ppc32_macos
.text
.align 3
.globl _poly1305_ppc32_macos
.globl poly1305_ppc32_macos
_poly1305_ppc32_macos:
poly1305_ppc32_macos:
stwu r1,-432(r1)

; qhasm: input out

; qhasm: input r

; qhasm: input s

; qhasm: input m

; qhasm: input l

; qhasm:   round to nearest
mtfsfi 7,0

; qhasm:   i11_stack = i11
; asm 1: stw <i11=int32#11,>i11_stack=stack32#1
; asm 2: stw <i11=r13,>i11_stack=0(r1)
stw r13,0(r1)

; qhasm:   i12_stack = i12
; asm 1: stw <i12=int32#12,>i12_stack=stack32#2
; asm 2: stw <i12=r14,>i12_stack=4(r1)
stw r14,4(r1)

; qhasm:   i13_stack = i13
; asm 1: stw <i13=int32#13,>i13_stack=stack32#3
; asm 2: stw <i13=r15,>i13_stack=8(r1)
stw r15,8(r1)

; qhasm:   i14_stack = i14
; asm 1: stw <i14=int32#14,>i14_stack=stack32#4
; asm 2: stw <i14=r16,>i14_stack=12(r1)
stw r16,12(r1)

; qhasm:   i15_stack = i15
; asm 1: stw <i15=int32#15,>i15_stack=stack32#5
; asm 2: stw <i15=r17,>i15_stack=16(r1)
stw r17,16(r1)

; qhasm:   i16_stack = i16
; asm 1: stw <i16=int32#16,>i16_stack=stack32#6
; asm 2: stw <i16=r18,>i16_stack=20(r1)
stw r18,20(r1)

; qhasm:   i17_stack = i17
; asm 1: stw <i17=int32#17,>i17_stack=stack32#7
; asm 2: stw <i17=r19,>i17_stack=24(r1)
stw r19,24(r1)

; qhasm:   i18_stack = i18
; asm 1: stw <i18=int32#18,>i18_stack=stack32#8
; asm 2: stw <i18=r20,>i18_stack=28(r1)
stw r20,28(r1)

; qhasm:   i19_stack = i19
; asm 1: stw <i19=int32#19,>i19_stack=stack32#9
; asm 2: stw <i19=r21,>i19_stack=32(r1)
stw r21,32(r1)

; qhasm:   i20_stack = i20
; asm 1: stw <i20=int32#20,>i20_stack=stack32#10
; asm 2: stw <i20=r22,>i20_stack=36(r1)
stw r22,36(r1)

; qhasm:   i21_stack = i21
; asm 1: stw <i21=int32#21,>i21_stack=stack32#11
; asm 2: stw <i21=r23,>i21_stack=40(r1)
stw r23,40(r1)

; qhasm:   i22_stack = i22
; asm 1: stw <i22=int32#22,>i22_stack=stack32#12
; asm 2: stw <i22=r24,>i22_stack=44(r1)
stw r24,44(r1)

; qhasm:   i23_stack = i23
; asm 1: stw <i23=int32#23,>i23_stack=stack32#13
; asm 2: stw <i23=r25,>i23_stack=48(r1)
stw r25,48(r1)

; qhasm:   i24_stack = i24
; asm 1: stw <i24=int32#24,>i24_stack=stack32#14
; asm 2: stw <i24=r26,>i24_stack=52(r1)
stw r26,52(r1)

; qhasm:   i25_stack = i25
; asm 1: stw <i25=int32#25,>i25_stack=stack32#15
; asm 2: stw <i25=r27,>i25_stack=56(r1)
stw r27,56(r1)

; qhasm:   i26_stack = i26
; asm 1: stw <i26=int32#26,>i26_stack=stack32#16
; asm 2: stw <i26=r28,>i26_stack=60(r1)
stw r28,60(r1)

; qhasm:   i27_stack = i27
; asm 1: stw <i27=int32#27,>i27_stack=stack32#17
; asm 2: stw <i27=r29,>i27_stack=64(r1)
stw r29,64(r1)

; qhasm:   i28_stack = i28
; asm 1: stw <i28=int32#28,>i28_stack=stack32#18
; asm 2: stw <i28=r30,>i28_stack=68(r1)
stw r30,68(r1)

; qhasm:   i29_stack = i29
; asm 1: stw <i29=int32#29,>i29_stack=stack32#19
; asm 2: stw <i29=r31,>i29_stack=72(r1)
stw r31,72(r1)

; qhasm:   j15_stack = j15
; asm 1: stfd <j15=float64#15,>j15_stack=stack64#1
; asm 2: stfd <j15=f14,>j15_stack=80(r1)
stfd f14,80(r1)

; qhasm:   j16_stack = j16
; asm 1: stfd <j16=float64#16,>j16_stack=stack64#2
; asm 2: stfd <j16=f15,>j16_stack=88(r1)
stfd f15,88(r1)

; qhasm:   j17_stack = j17
; asm 1: stfd <j17=float64#17,>j17_stack=stack64#3
; asm 2: stfd <j17=f16,>j17_stack=96(r1)
stfd f16,96(r1)

; qhasm:   j18_stack = j18
; asm 1: stfd <j18=float64#18,>j18_stack=stack64#4
; asm 2: stfd <j18=f17,>j18_stack=104(r1)
stfd f17,104(r1)

; qhasm:   j19_stack = j19
; asm 1: stfd <j19=float64#19,>j19_stack=stack64#5
; asm 2: stfd <j19=f18,>j19_stack=112(r1)
stfd f18,112(r1)

; qhasm:   j20_stack = j20
; asm 1: stfd <j20=float64#20,>j20_stack=stack64#6
; asm 2: stfd <j20=f19,>j20_stack=120(r1)
stfd f19,120(r1)

; qhasm:   j21_stack = j21
; asm 1: stfd <j21=float64#21,>j21_stack=stack64#7
; asm 2: stfd <j21=f20,>j21_stack=128(r1)
stfd f20,128(r1)

; qhasm:   j22_stack = j22
; asm 1: stfd <j22=float64#22,>j22_stack=stack64#8
; asm 2: stfd <j22=f21,>j22_stack=136(r1)
stfd f21,136(r1)

; qhasm:   j23_stack = j23
; asm 1: stfd <j23=float64#23,>j23_stack=stack64#9
; asm 2: stfd <j23=f22,>j23_stack=144(r1)
stfd f22,144(r1)

; qhasm:   j24_stack = j24
; asm 1: stfd <j24=float64#24,>j24_stack=stack64#10
; asm 2: stfd <j24=f23,>j24_stack=152(r1)
stfd f23,152(r1)

; qhasm:   j25_stack = j25
; asm 1: stfd <j25=float64#25,>j25_stack=stack64#11
; asm 2: stfd <j25=f24,>j25_stack=160(r1)
stfd f24,160(r1)

; qhasm:   j26_stack = j26
; asm 1: stfd <j26=float64#26,>j26_stack=stack64#12
; asm 2: stfd <j26=f25,>j26_stack=168(r1)
stfd f25,168(r1)

; qhasm:   j27_stack = j27
; asm 1: stfd <j27=float64#27,>j27_stack=stack64#13
; asm 2: stfd <j27=f26,>j27_stack=176(r1)
stfd f26,176(r1)

; qhasm:   j28_stack = j28
; asm 1: stfd <j28=float64#28,>j28_stack=stack64#14
; asm 2: stfd <j28=f27,>j28_stack=184(r1)
stfd f27,184(r1)

; qhasm:   j29_stack = j29
; asm 1: stfd <j29=float64#29,>j29_stack=stack64#15
; asm 2: stfd <j29=f28,>j29_stack=192(r1)
stfd f28,192(r1)

; qhasm:   j30_stack = j30
; asm 1: stfd <j30=float64#30,>j30_stack=stack64#16
; asm 2: stfd <j30=f29,>j30_stack=200(r1)
stfd f29,200(r1)

; qhasm:   j31_stack = j31
; asm 1: stfd <j31=float64#31,>j31_stack=stack64#17
; asm 2: stfd <j31=f30,>j31_stack=208(r1)
stfd f30,208(r1)

; qhasm:   j32_stack = j32
; asm 1: stfd <j32=float64#32,>j32_stack=stack64#18
; asm 2: stfd <j32=f31,>j32_stack=216(r1)
stfd f31,216(r1)

; qhasm:   constants = &poly1305_ppc32_macos_constants & 0xffff0000
; asm 1: lis >constants=int32#6,hi16(poly1305_ppc32_macos_constants)
; asm 2: lis >constants=r8,hi16(poly1305_ppc32_macos_constants)
lis r8,hi16(poly1305_ppc32_macos_constants)

; qhasm:   r0 = *(swapendian uint32 *) r
; asm 1: lwbrx >r0=int32#7,0,<r=int32#2
; asm 2: lwbrx >r0=r9,0,<r=r4
lwbrx r9,0,r4

; qhasm:   r += 4
; asm 1: addi >r=int32#2,<r=int32#2,4
; asm 2: addi >r=r4,<r=r4,4
addi r4,r4,4

; qhasm:   m0 = 65536 * 0x4338
; asm 1: lis >m0=int32#8,0x4338
; asm 2: lis >m0=r10,0x4338
lis r10,0x4338

; qhasm:   constants |= &poly1305_ppc32_macos_constants & 0xffff
; asm 1: ori >constants=int32#6,<constants=int32#6,lo16(poly1305_ppc32_macos_constants)
; asm 2: ori >constants=r8,<constants=r8,lo16(poly1305_ppc32_macos_constants)
ori r8,r8,lo16(poly1305_ppc32_macos_constants)

; qhasm:   r1 = *(swapendian uint32 *) r
; asm 1: lwbrx >r1=int32#9,0,<r=int32#2
; asm 2: lwbrx >r1=r11,0,<r=r4
lwbrx r11,0,r4

; qhasm:   r += 4
; asm 1: addi >r=int32#2,<r=int32#2,4
; asm 2: addi >r=r4,<r=r4,4
addi r4,r4,4

; qhasm:   m1 = 65536 * 0x4538
; asm 1: lis >m1=int32#10,0x4538
; asm 2: lis >m1=r12,0x4538
lis r12,0x4538

; qhasm:   r2 = *(swapendian uint32 *) r
; asm 1: lwbrx >r2=int32#11,0,<r=int32#2
; asm 2: lwbrx >r2=r13,0,<r=r4
lwbrx r13,0,r4

; qhasm:   r += 4
; asm 1: addi >r=int32#2,<r=int32#2,4
; asm 2: addi >r=r4,<r=r4,4
addi r4,r4,4

; qhasm:   m2 = 65536 * 0x4738
; asm 1: lis >m2=int32#12,0x4738
; asm 2: lis >m2=r14,0x4738
lis r14,0x4738

; qhasm:   r3 = *(swapendian uint32 *) r
; asm 1: lwbrx >r3=int32#2,0,<r=int32#2
; asm 2: lwbrx >r3=r4,0,<r=r4
lwbrx r4,0,r4

; qhasm:   m3 = 65536 * 0x4938
; asm 1: lis >m3=int32#13,0x4938
; asm 2: lis >m3=r15,0x4938
lis r15,0x4938

; qhasm:   d0 top = m0
; asm 1: stw <m0=int32#8,>d0=stack64#19
; asm 2: stw <m0=r10,>d0=224(r1)
stw r10,224(r1)

; qhasm:   inplace d0 bottom = r0
; asm 1: stw <r0=int32#7,<d0=stack64#19
; asm 2: stw <r0=r9,<d0=228(r1)
stw r9,228(r1)

; qhasm:   d1 top = m1
; asm 1: stw <m1=int32#10,>d1=stack64#20
; asm 2: stw <m1=r12,>d1=232(r1)
stw r12,232(r1)

; qhasm:   inplace d1 bottom = r1
; asm 1: stw <r1=int32#9,<d1=stack64#20
; asm 2: stw <r1=r11,<d1=236(r1)
stw r11,236(r1)

; qhasm:   d2 top = m2
; asm 1: stw <m2=int32#12,>d2=stack64#21
; asm 2: stw <m2=r14,>d2=240(r1)
stw r14,240(r1)

; qhasm:   inplace d2 bottom = r2
; asm 1: stw <r2=int32#11,<d2=stack64#21
; asm 2: stw <r2=r13,<d2=244(r1)
stw r13,244(r1)

; qhasm:   d3 top = m3
; asm 1: stw <m3=int32#13,>d3=stack64#22
; asm 2: stw <m3=r15,>d3=248(r1)
stw r15,248(r1)

; qhasm:   inplace d3 bottom = r3
; asm 1: stw <r3=int32#2,<d3=stack64#22
; asm 2: stw <r3=r4,<d3=252(r1)
stw r4,252(r1)

; qhasm:   alpha32 = *(float64 *) (constants + 40)
; asm 1: lfd >alpha32=float64#1,40(<constants=int32#6)
; asm 2: lfd >alpha32=f0,40(<constants=r8)
lfd f0,40(r8)

; qhasm:   h0 = alpha32 - alpha32
; asm 1: fsub >h0=float64#2,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h0=f1,<alpha32=f0,<alpha32=f0
fsub f1,f0,f0

; qhasm:   h1 = alpha32 - alpha32
; asm 1: fsub >h1=float64#3,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h1=f2,<alpha32=f0,<alpha32=f0
fsub f2,f0,f0

; qhasm:   alpha0 = *(float64 *) (constants + 24)
; asm 1: lfd >alpha0=float64#4,24(<constants=int32#6)
; asm 2: lfd >alpha0=f3,24(<constants=r8)
lfd f3,24(r8)

; qhasm:   h2 = alpha32 - alpha32
; asm 1: fsub >h2=float64#5,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h2=f4,<alpha32=f0,<alpha32=f0
fsub f4,f0,f0

; qhasm:   alpha64 = *(float64 *) (constants + 56)
; asm 1: lfd >alpha64=float64#6,56(<constants=int32#6)
; asm 2: lfd >alpha64=f5,56(<constants=r8)
lfd f5,56(r8)

; qhasm:   h3 = alpha32 - alpha32
; asm 1: fsub >h3=float64#7,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h3=f6,<alpha32=f0,<alpha32=f0
fsub f6,f0,f0

; qhasm:   alpha18 = *(float64 *) (constants + 32)
; asm 1: lfd >alpha18=float64#8,32(<constants=int32#6)
; asm 2: lfd >alpha18=f7,32(<constants=r8)
lfd f7,32(r8)

; qhasm:   h4 = alpha32 - alpha32
; asm 1: fsub >h4=float64#9,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h4=f8,<alpha32=f0,<alpha32=f0
fsub f8,f0,f0

; qhasm:   r0low = d0
; asm 1: lfd >r0low=float64#10,<d0=stack64#19
; asm 2: lfd >r0low=f9,<d0=224(r1)
lfd f9,224(r1)

; qhasm:   h5 = alpha32 - alpha32
; asm 1: fsub >h5=float64#11,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h5=f10,<alpha32=f0,<alpha32=f0
fsub f10,f0,f0

; qhasm:   r1low = d1
; asm 1: lfd >r1low=float64#12,<d1=stack64#20
; asm 2: lfd >r1low=f11,<d1=232(r1)
lfd f11,232(r1)

; qhasm:   h6 = alpha32 - alpha32
; asm 1: fsub >h6=float64#13,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h6=f12,<alpha32=f0,<alpha32=f0
fsub f12,f0,f0

; qhasm:   r2low = d2
; asm 1: lfd >r2low=float64#14,<d2=stack64#21
; asm 2: lfd >r2low=f13,<d2=240(r1)
lfd f13,240(r1)

; qhasm:   h7 = alpha32 - alpha32
; asm 1: fsub >h7=float64#15,<alpha32=float64#1,<alpha32=float64#1
; asm 2: fsub >h7=f14,<alpha32=f0,<alpha32=f0
fsub f14,f0,f0

; qhasm:   alpha50 = *(float64 *) (constants + 48)
; asm 1: lfd >alpha50=float64#16,48(<constants=int32#6)
; asm 2: lfd >alpha50=f15,48(<constants=r8)
lfd f15,48(r8)

; qhasm:   r0low -= alpha0
; asm 1: fsub >r0low=float64#10,<r0low=float64#10,<alpha0=float64#4
; asm 2: fsub >r0low=f9,<r0low=f9,<alpha0=f3
fsub f9,f9,f3

; qhasm:   alpha82 = *(float64 *) (constants + 64)
; asm 1: lfd >alpha82=float64#17,64(<constants=int32#6)
; asm 2: lfd >alpha82=f16,64(<constants=r8)
lfd f16,64(r8)

; qhasm:   r1low -= alpha32
; asm 1: fsub >r1low=float64#12,<r1low=float64#12,<alpha32=float64#1
; asm 2: fsub >r1low=f11,<r1low=f11,<alpha32=f0
fsub f11,f11,f0

; qhasm:   scale = *(float64 *) (constants + 96)
; asm 1: lfd >scale=float64#18,96(<constants=int32#6)
; asm 2: lfd >scale=f17,96(<constants=r8)
lfd f17,96(r8)

; qhasm:   r2low -= alpha64
; asm 1: fsub >r2low=float64#14,<r2low=float64#14,<alpha64=float64#6
; asm 2: fsub >r2low=f13,<r2low=f13,<alpha64=f5
fsub f13,f13,f5

; qhasm:   alpha96 = *(float64 *) (constants + 72)
; asm 1: lfd >alpha96=float64#19,72(<constants=int32#6)
; asm 2: lfd >alpha96=f18,72(<constants=r8)
lfd f18,72(r8)

; qhasm:   r0high = r0low + alpha18
; asm 1: fadd >r0high=float64#20,<r0low=float64#10,<alpha18=float64#8
; asm 2: fadd >r0high=f19,<r0low=f9,<alpha18=f7
fadd f19,f9,f7

; qhasm:   r3low = d3
; asm 1: lfd >r3low=float64#21,<d3=stack64#22
; asm 2: lfd >r3low=f20,<d3=248(r1)
lfd f20,248(r1)

; qhasm:   alpham80 = *(float64 *) (constants + 0)
; asm 1: lfd >alpham80=float64#22,0(<constants=int32#6)
; asm 2: lfd >alpham80=f21,0(<constants=r8)
lfd f21,0(r8)

; qhasm:   r1high = r1low + alpha50
; asm 1: fadd >r1high=float64#23,<r1low=float64#12,<alpha50=float64#16
; asm 2: fadd >r1high=f22,<r1low=f11,<alpha50=f15
fadd f22,f11,f15

; qhasm:   sr1low = scale * r1low
; asm 1: fmul >sr1low=float64#24,<scale=float64#18,<r1low=float64#12
; asm 2: fmul >sr1low=f23,<scale=f17,<r1low=f11
fmul f23,f17,f11

; qhasm:   alpham48 = *(float64 *) (constants + 8)
; asm 1: lfd >alpham48=float64#25,8(<constants=int32#6)
; asm 2: lfd >alpham48=f24,8(<constants=r8)
lfd f24,8(r8)

; qhasm:   r2high = r2low + alpha82
; asm 1: fadd >r2high=float64#26,<r2low=float64#14,<alpha82=float64#17
; asm 2: fadd >r2high=f25,<r2low=f13,<alpha82=f16
fadd f25,f13,f16

; qhasm:   sr2low = scale * r2low
; asm 1: fmul >sr2low=float64#27,<scale=float64#18,<r2low=float64#14
; asm 2: fmul >sr2low=f26,<scale=f17,<r2low=f13
fmul f26,f17,f13

; qhasm:   r0high -= alpha18
; asm 1: fsub >r0high=float64#8,<r0high=float64#20,<alpha18=float64#8
; asm 2: fsub >r0high=f7,<r0high=f19,<alpha18=f7
fsub f7,f19,f7

; qhasm: <? (uint32) l - 16
; asm 1: cmplwi <l=int32#5,16
; asm 2: cmplwi <l=r7,16
cmplwi r7,16

; qhasm:   r3low -= alpha96
; asm 1: fsub >r3low=float64#20,<r3low=float64#21,<alpha96=float64#19
; asm 2: fsub >r3low=f19,<r3low=f20,<alpha96=f18
fsub f19,f20,f18

; qhasm:   r1high -= alpha50
; asm 1: fsub >r1high=float64#16,<r1high=float64#23,<alpha50=float64#16
; asm 2: fsub >r1high=f15,<r1high=f22,<alpha50=f15
fsub f15,f22,f15

; qhasm:   sr1high = sr1low + alpham80
; asm 1: fadd >sr1high=float64#21,<sr1low=float64#24,<alpham80=float64#22
; asm 2: fadd >sr1high=f20,<sr1low=f23,<alpham80=f21
fadd f20,f23,f21

; qhasm:   alpha112 = *(float64 *) (constants + 80)
; asm 1: lfd >alpha112=float64#23,80(<constants=int32#6)
; asm 2: lfd >alpha112=f22,80(<constants=r8)
lfd f22,80(r8)

; qhasm:   r0low -= r0high
; asm 1: fsub >r0low=float64#10,<r0low=float64#10,<r0high=float64#8
; asm 2: fsub >r0low=f9,<r0low=f9,<r0high=f7
fsub f9,f9,f7

; qhasm:   alpham16 = *(float64 *) (constants + 16)
; asm 1: lfd >alpham16=float64#28,16(<constants=int32#6)
; asm 2: lfd >alpham16=f27,16(<constants=r8)
lfd f27,16(r8)

; qhasm:   r2high -= alpha82
; asm 1: fsub >r2high=float64#17,<r2high=float64#26,<alpha82=float64#17
; asm 2: fsub >r2high=f16,<r2high=f25,<alpha82=f16
fsub f16,f25,f16

; qhasm:   sr3low = scale * r3low
; asm 1: fmul >sr3low=float64#26,<scale=float64#18,<r3low=float64#20
; asm 2: fmul >sr3low=f25,<scale=f17,<r3low=f19
fmul f25,f17,f19

; qhasm:   alpha130 = *(float64 *) (constants + 88)
; asm 1: lfd >alpha130=float64#29,88(<constants=int32#6)
; asm 2: lfd >alpha130=f28,88(<constants=r8)
lfd f28,88(r8)

; qhasm:   sr2high = sr2low + alpham48
; asm 1: fadd >sr2high=float64#30,<sr2low=float64#27,<alpham48=float64#25
; asm 2: fadd >sr2high=f29,<sr2low=f26,<alpham48=f24
fadd f29,f26,f24

; qhasm:   r1low -= r1high
; asm 1: fsub >r1low=float64#12,<r1low=float64#12,<r1high=float64#16
; asm 2: fsub >r1low=f11,<r1low=f11,<r1high=f15
fsub f11,f11,f15

; qhasm:   sr1high -= alpham80
; asm 1: fsub >sr1high=float64#21,<sr1high=float64#21,<alpham80=float64#22
; asm 2: fsub >sr1high=f20,<sr1high=f20,<alpham80=f21
fsub f20,f20,f21

; qhasm:   sr1high_stack = sr1high
; asm 1: stfd <sr1high=float64#21,>sr1high_stack=stack64#19
; asm 2: stfd <sr1high=f20,>sr1high_stack=224(r1)
stfd f20,224(r1)

; qhasm:   r2low -= r2high
; asm 1: fsub >r2low=float64#14,<r2low=float64#14,<r2high=float64#17
; asm 2: fsub >r2low=f13,<r2low=f13,<r2high=f16
fsub f13,f13,f16

; qhasm:   sr2high -= alpham48
; asm 1: fsub >sr2high=float64#22,<sr2high=float64#30,<alpham48=float64#25
; asm 2: fsub >sr2high=f21,<sr2high=f29,<alpham48=f24
fsub f21,f29,f24

; qhasm:   sr2high_stack = sr2high
; asm 1: stfd <sr2high=float64#22,>sr2high_stack=stack64#20
; asm 2: stfd <sr2high=f21,>sr2high_stack=232(r1)
stfd f21,232(r1)

; qhasm:   r3high = r3low + alpha112
; asm 1: fadd >r3high=float64#25,<r3low=float64#20,<alpha112=float64#23
; asm 2: fadd >r3high=f24,<r3low=f19,<alpha112=f22
fadd f24,f19,f22

; qhasm:   sr1low -= sr1high
; asm 1: fsub >sr1low=float64#21,<sr1low=float64#24,<sr1high=float64#21
; asm 2: fsub >sr1low=f20,<sr1low=f23,<sr1high=f20
fsub f20,f23,f20

; qhasm:   sr1low_stack = sr1low
; asm 1: stfd <sr1low=float64#21,>sr1low_stack=stack64#21
; asm 2: stfd <sr1low=f20,>sr1low_stack=240(r1)
stfd f20,240(r1)

; qhasm:   sr3high = sr3low + alpham16
; asm 1: fadd >sr3high=float64#21,<sr3low=float64#26,<alpham16=float64#28
; asm 2: fadd >sr3high=f20,<sr3low=f25,<alpham16=f27
fadd f20,f25,f27

; qhasm:   sr2low -= sr2high
; asm 1: fsub >sr2low=float64#22,<sr2low=float64#27,<sr2high=float64#22
; asm 2: fsub >sr2low=f21,<sr2low=f26,<sr2high=f21
fsub f21,f26,f21

; qhasm:   sr2low_stack = sr2low
; asm 1: stfd <sr2low=float64#22,>sr2low_stack=stack64#22
; asm 2: stfd <sr2low=f21,>sr2low_stack=248(r1)
stfd f21,248(r1)

; qhasm:   r3high -= alpha112
; asm 1: fsub >r3high=float64#22,<r3high=float64#25,<alpha112=float64#23
; asm 2: fsub >r3high=f21,<r3high=f24,<alpha112=f22
fsub f21,f24,f22

; qhasm:   sr3high -= alpham16
; asm 1: fsub >sr3high=float64#21,<sr3high=float64#21,<alpham16=float64#28
; asm 2: fsub >sr3high=f20,<sr3high=f20,<alpham16=f27
fsub f20,f20,f27

; qhasm:   sr3high_stack = sr3high
; asm 1: stfd <sr3high=float64#21,>sr3high_stack=stack64#23
; asm 2: stfd <sr3high=f20,>sr3high_stack=256(r1)
stfd f20,256(r1)

; qhasm:   r3low -= r3high
; asm 1: fsub >r3low=float64#20,<r3low=float64#20,<r3high=float64#22
; asm 2: fsub >r3low=f19,<r3low=f19,<r3high=f21
fsub f19,f19,f21

; qhasm:   sr3low -= sr3high
; asm 1: fsub >sr3low=float64#21,<sr3low=float64#26,<sr3high=float64#21
; asm 2: fsub >sr3low=f20,<sr3low=f25,<sr3high=f20
fsub f20,f25,f20

; qhasm:   sr3low_stack = sr3low
; asm 1: stfd <sr3low=float64#21,>sr3low_stack=stack64#24
; asm 2: stfd <sr3low=f20,>sr3low_stack=264(r1)
stfd f20,264(r1)

; qhasm: goto addatmost15bytes if <
blt .label.addatmost15bytes

; qhasm:   m0 = *(swapendian uint32 *) m
; asm 1: lwbrx >m0=int32#2,0,<m=int32#4
; asm 2: lwbrx >m0=r4,0,<m=r6
lwbrx r4,0,r6

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   f0 = 65536 * 0x4338
; asm 1: lis >f0=int32#7,0x4338
; asm 2: lis >f0=r9,0x4338
lis r9,0x4338

; qhasm:   m1 = *(swapendian uint32 *) m
; asm 1: lwbrx >m1=int32#8,0,<m=int32#4
; asm 2: lwbrx >m1=r10,0,<m=r6
lwbrx r10,0,r6

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   f1 = 65536 * 0x4538
; asm 1: lis >f1=int32#9,0x4538
; asm 2: lis >f1=r11,0x4538
lis r11,0x4538

; qhasm:   m2 = *(swapendian uint32 *) m
; asm 1: lwbrx >m2=int32#10,0,<m=int32#4
; asm 2: lwbrx >m2=r12,0,<m=r6
lwbrx r12,0,r6

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   f2 = 65536 * 0x4738
; asm 1: lis >f2=int32#11,0x4738
; asm 2: lis >f2=r13,0x4738
lis r13,0x4738

; qhasm:   m3 = *(swapendian uint32 *) m
; asm 1: lwbrx >m3=int32#12,0,<m=int32#4
; asm 2: lwbrx >m3=r14,0,<m=r6
lwbrx r14,0,r6

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   f3 = 65536 * 0x4938
; asm 1: lis >f3=int32#13,0x4938
; asm 2: lis >f3=r15,0x4938
lis r15,0x4938

; qhasm:   l -= 16
; asm 1: addi >l=int32#5,<l=int32#5,-16
; asm 2: addi >l=r7,<l=r7,-16
addi r7,r7,-16

; qhasm:   f3 += 1
; asm 1: addi >f3=int32#13,<f3=int32#13,1
; asm 2: addi >f3=r15,<f3=r15,1
addi r15,r15,1

; qhasm:   d0 top = f0
; asm 1: stw <f0=int32#7,>d0=stack64#25
; asm 2: stw <f0=r9,>d0=272(r1)
stw r9,272(r1)

; qhasm:   inplace d0 bottom = m0
; asm 1: stw <m0=int32#2,<d0=stack64#25
; asm 2: stw <m0=r4,<d0=276(r1)
stw r4,276(r1)

; qhasm:   d1 top = f1
; asm 1: stw <f1=int32#9,>d1=stack64#26
; asm 2: stw <f1=r11,>d1=280(r1)
stw r11,280(r1)

; qhasm:   inplace d1 bottom = m1
; asm 1: stw <m1=int32#8,<d1=stack64#26
; asm 2: stw <m1=r10,<d1=284(r1)
stw r10,284(r1)

; qhasm:   d2 top = f2
; asm 1: stw <f2=int32#11,>d2=stack64#27
; asm 2: stw <f2=r13,>d2=288(r1)
stw r13,288(r1)

; qhasm:   inplace d2 bottom = m2
; asm 1: stw <m2=int32#10,<d2=stack64#27
; asm 2: stw <m2=r12,<d2=292(r1)
stw r12,292(r1)

; qhasm:   d3 top = f3
; asm 1: stw <f3=int32#13,>d3=stack64#28
; asm 2: stw <f3=r15,>d3=296(r1)
stw r15,296(r1)

; qhasm:   inplace d3 bottom = m3
; asm 1: stw <m3=int32#12,<d3=stack64#28
; asm 2: stw <m3=r14,<d3=300(r1)
stw r14,300(r1)

; qhasm: <? (uint32) l - 16
; asm 1: cmplwi <l=int32#5,16
; asm 2: cmplwi <l=r7,16
cmplwi r7,16

; qhasm:   z0 = d0
; asm 1: lfd >z0=float64#21,<d0=stack64#25
; asm 2: lfd >z0=f20,<d0=272(r1)
lfd f20,272(r1)

; qhasm:   z1 = d1
; asm 1: lfd >z1=float64#23,<d1=stack64#26
; asm 2: lfd >z1=f22,<d1=280(r1)
lfd f22,280(r1)

; qhasm:   z2 = d2
; asm 1: lfd >z2=float64#24,<d2=stack64#27
; asm 2: lfd >z2=f23,<d2=288(r1)
lfd f23,288(r1)

; qhasm:   z3 = d3
; asm 1: lfd >z3=float64#25,<d3=stack64#28
; asm 2: lfd >z3=f24,<d3=296(r1)
lfd f24,296(r1)

; qhasm:   z0 -= alpha0
; asm 1: fsub >z0=float64#4,<z0=float64#21,<alpha0=float64#4
; asm 2: fsub >z0=f3,<z0=f20,<alpha0=f3
fsub f3,f20,f3

; qhasm:   z1 -= alpha32
; asm 1: fsub >z1=float64#21,<z1=float64#23,<alpha32=float64#1
; asm 2: fsub >z1=f20,<z1=f22,<alpha32=f0
fsub f20,f22,f0

; qhasm:   z2 -= alpha64
; asm 1: fsub >z2=float64#23,<z2=float64#24,<alpha64=float64#6
; asm 2: fsub >z2=f22,<z2=f23,<alpha64=f5
fsub f22,f23,f5

; qhasm:   z3 -= alpha96
; asm 1: fsub >z3=float64#24,<z3=float64#25,<alpha96=float64#19
; asm 2: fsub >z3=f23,<z3=f24,<alpha96=f18
fsub f23,f24,f18

; qhasm:   h0 += z0
; asm 1: fadd >h0=float64#2,<h0=float64#2,<z0=float64#4
; asm 2: fadd >h0=f1,<h0=f1,<z0=f3
fadd f1,f1,f3

; qhasm:   h1 += z1
; asm 1: fadd >h1=float64#3,<h1=float64#3,<z1=float64#21
; asm 2: fadd >h1=f2,<h1=f2,<z1=f20
fadd f2,f2,f20

; qhasm:   h3 += z2
; asm 1: fadd >h3=float64#4,<h3=float64#7,<z2=float64#23
; asm 2: fadd >h3=f3,<h3=f6,<z2=f22
fadd f3,f6,f22

; qhasm:   h5 += z3
; asm 1: fadd >h5=float64#7,<h5=float64#11,<z3=float64#24
; asm 2: fadd >h5=f6,<h5=f10,<z3=f23
fadd f6,f10,f23

; qhasm: goto multiplyaddatmost15bytes if <
blt .label.multiplyaddatmost15bytes

; qhasm: multiplyaddatleast16bytes:
.label.multiplyaddatleast16bytes:

; qhasm:   m0 = *(swapendian uint32 *) m
; asm 1: lwbrx >m0=int32#2,0,<m=int32#4
; asm 2: lwbrx >m0=r4,0,<m=r6
lwbrx r4,0,r6

; qhasm:   y1 = h1 + alpha32
; asm 1: fadd >y1=float64#11,<h1=float64#3,<alpha32=float64#1
; asm 2: fadd >y1=f10,<h1=f2,<alpha32=f0
fadd f10,f2,f0

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   y0 = h0 + alpha32
; asm 1: fadd >y0=float64#21,<h0=float64#2,<alpha32=float64#1
; asm 2: fadd >y0=f20,<h0=f1,<alpha32=f0
fadd f20,f1,f0

; qhasm:   f0 = 65536 * 0x4338
; asm 1: lis >f0=int32#7,0x4338
; asm 2: lis >f0=r9,0x4338
lis r9,0x4338

; qhasm:   y7 = h7 + alpha130
; asm 1: fadd >y7=float64#23,<h7=float64#15,<alpha130=float64#29
; asm 2: fadd >y7=f22,<h7=f14,<alpha130=f28
fadd f22,f14,f28

; qhasm:   m1 = *(swapendian uint32 *) m
; asm 1: lwbrx >m1=int32#8,0,<m=int32#4
; asm 2: lwbrx >m1=r10,0,<m=r6
lwbrx r10,0,r6

; qhasm:   y6 = h6 + alpha130
; asm 1: fadd >y6=float64#24,<h6=float64#13,<alpha130=float64#29
; asm 2: fadd >y6=f23,<h6=f12,<alpha130=f28
fadd f23,f12,f28

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   y5 = h5 + alpha96
; asm 1: fadd >y5=float64#25,<h5=float64#7,<alpha96=float64#19
; asm 2: fadd >y5=f24,<h5=f6,<alpha96=f18
fadd f24,f6,f18

; qhasm:   f1 = 65536 * 0x4538
; asm 1: lis >f1=int32#9,0x4538
; asm 2: lis >f1=r11,0x4538
lis r11,0x4538

; qhasm:   y4 = h4 + alpha96
; asm 1: fadd >y4=float64#26,<h4=float64#9,<alpha96=float64#19
; asm 2: fadd >y4=f25,<h4=f8,<alpha96=f18
fadd f25,f8,f18

; qhasm:   m2 = *(swapendian uint32 *) m
; asm 1: lwbrx >m2=int32#10,0,<m=int32#4
; asm 2: lwbrx >m2=r12,0,<m=r6
lwbrx r12,0,r6

; qhasm:   y3 = h3 + alpha64
; asm 1: fadd >y3=float64#27,<h3=float64#4,<alpha64=float64#6
; asm 2: fadd >y3=f26,<h3=f3,<alpha64=f5
fadd f26,f3,f5

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   y2 = h2 + alpha64
; asm 1: fadd >y2=float64#28,<h2=float64#5,<alpha64=float64#6
; asm 2: fadd >y2=f27,<h2=f4,<alpha64=f5
fadd f27,f4,f5

; qhasm:   f2 = 65536 * 0x4738
; asm 1: lis >f2=int32#11,0x4738
; asm 2: lis >f2=r13,0x4738
lis r13,0x4738

; qhasm:   y1 -= alpha32
; asm 1: fsub >y1=float64#11,<y1=float64#11,<alpha32=float64#1
; asm 2: fsub >y1=f10,<y1=f10,<alpha32=f0
fsub f10,f10,f0

; qhasm:   m3 = *(swapendian uint32 *) m
; asm 1: lwbrx >m3=int32#12,0,<m=int32#4
; asm 2: lwbrx >m3=r14,0,<m=r6
lwbrx r14,0,r6

; qhasm:   y0 -= alpha32
; asm 1: fsub >y0=float64#21,<y0=float64#21,<alpha32=float64#1
; asm 2: fsub >y0=f20,<y0=f20,<alpha32=f0
fsub f20,f20,f0

; qhasm:   m += 4
; asm 1: addi >m=int32#4,<m=int32#4,4
; asm 2: addi >m=r6,<m=r6,4
addi r6,r6,4

; qhasm:   y7 -= alpha130
; asm 1: fsub >y7=float64#23,<y7=float64#23,<alpha130=float64#29
; asm 2: fsub >y7=f22,<y7=f22,<alpha130=f28
fsub f22,f22,f28

; qhasm:   f3 = 65536 * 0x4938
; asm 1: lis >f3=int32#13,0x4938
; asm 2: lis >f3=r15,0x4938
lis r15,0x4938

; qhasm:   y6 -= alpha130
; asm 1: fsub >y6=float64#24,<y6=float64#24,<alpha130=float64#29
; asm 2: fsub >y6=f23,<y6=f23,<alpha130=f28
fsub f23,f23,f28

; qhasm:   l -= 16
; asm 1: addi >l=int32#5,<l=int32#5,-16
; asm 2: addi >l=r7,<l=r7,-16
addi r7,r7,-16

; qhasm:   y5 -= alpha96
; asm 1: fsub >y5=float64#25,<y5=float64#25,<alpha96=float64#19
; asm 2: fsub >y5=f24,<y5=f24,<alpha96=f18
fsub f24,f24,f18

; qhasm:   f3 += 1
; asm 1: addi >f3=int32#13,<f3=int32#13,1
; asm 2: addi >f3=r15,<f3=r15,1
addi r15,r15,1

; qhasm:   y4 -= alpha96
; asm 1: fsub >y4=float64#26,<y4=float64#26,<alpha96=float64#19
; asm 2: fsub >y4=f25,<y4=f25,<alpha96=f18
fsub f25,f25,f18

; qhasm:   d0 top = f0
; asm 1: stw <f0=int32#7,>d0=stack64#25
; asm 2: stw <f0=r9,>d0=272(r1)
stw r9,272(r1)

; qhasm:   y3 -= alpha64
; asm 1: fsub >y3=float64#27,<y3=float64#27,<alpha64=float64#6
; asm 2: fsub >y3=f26,<y3=f26,<alpha64=f5
fsub f26,f26,f5

; qhasm:   inplace d0 bottom = m0
; asm 1: stw <m0=int32#2,<d0=stack64#25
; asm 2: stw <m0=r4,<d0=276(r1)
stw r4,276(r1)

; qhasm:   y2 -= alpha64
; asm 1: fsub >y2=float64#28,<y2=float64#28,<alpha64=float64#6
; asm 2: fsub >y2=f27,<y2=f27,<alpha64=f5
fsub f27,f27,f5

; qhasm:   d1 top = f1
; asm 1: stw <f1=int32#9,>d1=stack64#26
; asm 2: stw <f1=r11,>d1=280(r1)
stw r11,280(r1)

; qhasm:   x1 = h1 - y1
; asm 1: fsub >x1=float64#3,<h1=float64#3,<y1=float64#11
; asm 2: fsub >x1=f2,<h1=f2,<y1=f10
fsub f2,f2,f10

; qhasm:   inplace d1 bottom = m1
; asm 1: stw <m1=int32#8,<d1=stack64#26
; asm 2: stw <m1=r10,<d1=284(r1)
stw r10,284(r1)

; qhasm:   x0 = h0 - y0
; asm 1: fsub >x0=float64#2,<h0=float64#2,<y0=float64#21
; asm 2: fsub >x0=f1,<h0=f1,<y0=f20
fsub f1,f1,f20

; qhasm:   d2 top = f2
; asm 1: stw <f2=int32#11,>d2=stack64#27
; asm 2: stw <f2=r13,>d2=288(r1)
stw r13,288(r1)

; qhasm:   x7 = h7 - y7
; asm 1: fsub >x7=float64#15,<h7=float64#15,<y7=float64#23
; asm 2: fsub >x7=f14,<h7=f14,<y7=f22
fsub f14,f14,f22

; qhasm:   inplace d2 bottom = m2
; asm 1: stw <m2=int32#10,<d2=stack64#27
; asm 2: stw <m2=r12,<d2=292(r1)
stw r12,292(r1)

; qhasm:   x6 = h6 - y6
; asm 1: fsub >x6=float64#13,<h6=float64#13,<y6=float64#24
; asm 2: fsub >x6=f12,<h6=f12,<y6=f23
fsub f12,f12,f23

; qhasm:   d3 top = f3
; asm 1: stw <f3=int32#13,>d3=stack64#28
; asm 2: stw <f3=r15,>d3=296(r1)
stw r15,296(r1)

; qhasm:   x5 = h5 - y5
; asm 1: fsub >x5=float64#7,<h5=float64#7,<y5=float64#25
; asm 2: fsub >x5=f6,<h5=f6,<y5=f24
fsub f6,f6,f24

; qhasm:   inplace d3 bottom = m3
; asm 1: stw <m3=int32#12,<d3=stack64#28
; asm 2: stw <m3=r14,<d3=300(r1)
stw r14,300(r1)

; qhasm:   x4 = h4 - y4
; asm 1: fsub >x4=float64#9,<h4=float64#9,<y4=float64#26
; asm 2: fsub >x4=f8,<h4=f8,<y4=f25
fsub f8,f8,f25

; qhasm:   x3 = h3 - y3
; asm 1: fsub >x3=float64#4,<h3=float64#4,<y3=float64#27
; asm 2: fsub >x3=f3,<h3=f3,<y3=f26
fsub f3,f3,f26

; qhasm:   x2 = h2 - y2
; asm 1: fsub >x2=float64#5,<h2=float64#5,<y2=float64#28
; asm 2: fsub >x2=f4,<h2=f4,<y2=f27
fsub f4,f4,f27

; qhasm:   x1 += y7 * scale
; asm 1: fmadd >x1=float64#3,<y7=float64#23,<scale=float64#18,<x1=float64#3
; asm 2: fmadd >x1=f2,<y7=f22,<scale=f17,<x1=f2
fmadd f2,f22,f17,f2

; qhasm:   x0 += y6 * scale
; asm 1: fmadd >x0=float64#2,<y6=float64#24,<scale=float64#18,<x0=float64#2
; asm 2: fmadd >x0=f1,<y6=f23,<scale=f17,<x0=f1
fmadd f1,f23,f17,f1

; qhasm:   x7 += y5
; asm 1: fadd >x7=float64#15,<x7=float64#15,<y5=float64#25
; asm 2: fadd >x7=f14,<x7=f14,<y5=f24
fadd f14,f14,f24

; qhasm:   x6 += y4
; asm 1: fadd >x6=float64#13,<x6=float64#13,<y4=float64#26
; asm 2: fadd >x6=f12,<x6=f12,<y4=f25
fadd f12,f12,f25

; qhasm:   x5 += y3
; asm 1: fadd >x5=float64#7,<x5=float64#7,<y3=float64#27
; asm 2: fadd >x5=f6,<x5=f6,<y3=f26
fadd f6,f6,f26

; qhasm:   x4 += y2
; asm 1: fadd >x4=float64#9,<x4=float64#9,<y2=float64#28
; asm 2: fadd >x4=f8,<x4=f8,<y2=f27
fadd f8,f8,f27

; qhasm:   x3 += y1
; asm 1: fadd >x3=float64#4,<x3=float64#4,<y1=float64#11
; asm 2: fadd >x3=f3,<x3=f3,<y1=f10
fadd f3,f3,f10

; qhasm:   x2 += y0
; asm 1: fadd >x2=float64#5,<x2=float64#5,<y0=float64#21
; asm 2: fadd >x2=f4,<x2=f4,<y0=f20
fadd f4,f4,f20

; qhasm:   x0 += x1
; asm 1: fadd >x0=float64#2,<x0=float64#2,<x1=float64#3
; asm 2: fadd >x0=f1,<x0=f1,<x1=f2
fadd f1,f1,f2

; qhasm:   x6 += x7
; asm 1: fadd >x6=float64#3,<x6=float64#13,<x7=float64#15
; asm 2: fadd >x6=f2,<x6=f12,<x7=f14
fadd f2,f12,f14

; qhasm:   x4 += x5
; asm 1: fadd >x4=float64#7,<x4=float64#9,<x5=float64#7
; asm 2: fadd >x4=f6,<x4=f8,<x5=f6
fadd f6,f8,f6

; qhasm:   x2 += x3
; asm 1: fadd >x2=float64#4,<x2=float64#5,<x3=float64#4
; asm 2: fadd >x2=f3,<x2=f4,<x3=f3
fadd f3,f4,f3

; qhasm:   h7 = r3high * x0
; asm 1: fmul >h7=float64#5,<r3high=float64#22,<x0=float64#2
; asm 2: fmul >h7=f4,<r3high=f21,<x0=f1
fmul f4,f21,f1

; qhasm:   h6 = r3low * x0
; asm 1: fmul >h6=float64#9,<r3low=float64#20,<x0=float64#2
; asm 2: fmul >h6=f8,<r3low=f19,<x0=f1
fmul f8,f19,f1

; qhasm:   h5 = r2high * x0
; asm 1: fmul >h5=float64#11,<r2high=float64#17,<x0=float64#2
; asm 2: fmul >h5=f10,<r2high=f16,<x0=f1
fmul f10,f16,f1

; qhasm:   h4 = r2low * x0
; asm 1: fmul >h4=float64#13,<r2low=float64#14,<x0=float64#2
; asm 2: fmul >h4=f12,<r2low=f13,<x0=f1
fmul f12,f13,f1

; qhasm:   h3 = r1high * x0
; asm 1: fmul >h3=float64#15,<r1high=float64#16,<x0=float64#2
; asm 2: fmul >h3=f14,<r1high=f15,<x0=f1
fmul f14,f15,f1

; qhasm:   h2 = r1low * x0
; asm 1: fmul >h2=float64#21,<r1low=float64#12,<x0=float64#2
; asm 2: fmul >h2=f20,<r1low=f11,<x0=f1
fmul f20,f11,f1

; qhasm:   h1 = r0high * x0
; asm 1: fmul >h1=float64#23,<r0high=float64#8,<x0=float64#2
; asm 2: fmul >h1=f22,<r0high=f7,<x0=f1
fmul f22,f7,f1

; qhasm:   h0 = r0low * x0
; asm 1: fmul >h0=float64#2,<r0low=float64#10,<x0=float64#2
; asm 2: fmul >h0=f1,<r0low=f9,<x0=f1
fmul f1,f9,f1

; qhasm: <? (uint32) l - 16
; asm 1: cmplwi <l=int32#5,16
; asm 2: cmplwi <l=r7,16
cmplwi r7,16

; qhasm:   h7 += r2high * x2
; asm 1: fmadd >h7=float64#5,<r2high=float64#17,<x2=float64#4,<h7=float64#5
; asm 2: fmadd >h7=f4,<r2high=f16,<x2=f3,<h7=f4
fmadd f4,f16,f3,f4

; qhasm:   h6 += r2low * x2
; asm 1: fmadd >h6=float64#9,<r2low=float64#14,<x2=float64#4,<h6=float64#9
; asm 2: fmadd >h6=f8,<r2low=f13,<x2=f3,<h6=f8
fmadd f8,f13,f3,f8

; qhasm:   h5 += r1high * x2
; asm 1: fmadd >h5=float64#11,<r1high=float64#16,<x2=float64#4,<h5=float64#11
; asm 2: fmadd >h5=f10,<r1high=f15,<x2=f3,<h5=f10
fmadd f10,f15,f3,f10

; qhasm:   h4 += r1low * x2
; asm 1: fmadd >h4=float64#13,<r1low=float64#12,<x2=float64#4,<h4=float64#13
; asm 2: fmadd >h4=f12,<r1low=f11,<x2=f3,<h4=f12
fmadd f12,f11,f3,f12

; qhasm:   h3 += r0high * x2
; asm 1: fmadd >h3=float64#24,<r0high=float64#8,<x2=float64#4,<h3=float64#15
; asm 2: fmadd >h3=f23,<r0high=f7,<x2=f3,<h3=f14
fmadd f23,f7,f3,f14

; qhasm:   h2 += r0low * x2
; asm 1: fmadd >h2=float64#21,<r0low=float64#10,<x2=float64#4,<h2=float64#21
; asm 2: fmadd >h2=f20,<r0low=f9,<x2=f3,<h2=f20
fmadd f20,f9,f3,f20

; qhasm:   h7 += r1high * x4
; asm 1: fmadd >h7=float64#5,<r1high=float64#16,<x4=float64#7,<h7=float64#5
; asm 2: fmadd >h7=f4,<r1high=f15,<x4=f6,<h7=f4
fmadd f4,f15,f6,f4

; qhasm:   h6 += r1low * x4
; asm 1: fmadd >h6=float64#9,<r1low=float64#12,<x4=float64#7,<h6=float64#9
; asm 2: fmadd >h6=f8,<r1low=f11,<x4=f6,<h6=f8
fmadd f8,f11,f6,f8

; qhasm:   sr3high = sr3high_stack
; asm 1: lfd >sr3high=float64#25,<sr3high_stack=stack64#23
; asm 2: lfd >sr3high=f24,<sr3high_stack=256(r1)
lfd f24,256(r1)

; qhasm:   h5 += r0high * x4
; asm 1: fmadd >h5=float64#11,<r0high=float64#8,<x4=float64#7,<h5=float64#11
; asm 2: fmadd >h5=f10,<r0high=f7,<x4=f6,<h5=f10
fmadd f10,f7,f6,f10

; qhasm:   sr3low = sr3low_stack
; asm 1: lfd >sr3low=float64#26,<sr3low_stack=stack64#24
; asm 2: lfd >sr3low=f25,<sr3low_stack=264(r1)
lfd f25,264(r1)

; qhasm:   h4 += r0low * x4
; asm 1: fmadd >h4=float64#27,<r0low=float64#10,<x4=float64#7,<h4=float64#13
; asm 2: fmadd >h4=f26,<r0low=f9,<x4=f6,<h4=f12
fmadd f26,f9,f6,f12

; qhasm:   h7 += r0high * x6
; asm 1: fmadd >h7=float64#15,<r0high=float64#8,<x6=float64#3,<h7=float64#5
; asm 2: fmadd >h7=f14,<r0high=f7,<x6=f2,<h7=f4
fmadd f14,f7,f2,f4

; qhasm:   h6 += r0low * x6
; asm 1: fmadd >h6=float64#13,<r0low=float64#10,<x6=float64#3,<h6=float64#9
; asm 2: fmadd >h6=f12,<r0low=f9,<x6=f2,<h6=f8
fmadd f12,f9,f2,f8

; qhasm:   h1 += sr3high * x2
; asm 1: fmadd >h1=float64#5,<sr3high=float64#25,<x2=float64#4,<h1=float64#23
; asm 2: fmadd >h1=f4,<sr3high=f24,<x2=f3,<h1=f22
fmadd f4,f24,f3,f22

; qhasm:   h0 += sr3low * x2
; asm 1: fmadd >h0=float64#2,<sr3low=float64#26,<x2=float64#4,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr3low=f25,<x2=f3,<h0=f1
fmadd f1,f25,f3,f1

; qhasm:   sr2high = sr2high_stack
; asm 1: lfd >sr2high=float64#4,<sr2high_stack=stack64#20
; asm 2: lfd >sr2high=f3,<sr2high_stack=232(r1)
lfd f3,232(r1)

; qhasm:   h3 += sr3high * x4
; asm 1: fmadd >h3=float64#23,<sr3high=float64#25,<x4=float64#7,<h3=float64#24
; asm 2: fmadd >h3=f22,<sr3high=f24,<x4=f6,<h3=f23
fmadd f22,f24,f6,f23

; qhasm:   sr2low = sr2low_stack
; asm 1: lfd >sr2low=float64#24,<sr2low_stack=stack64#22
; asm 2: lfd >sr2low=f23,<sr2low_stack=248(r1)
lfd f23,248(r1)

; qhasm:   h2 += sr3low * x4
; asm 1: fmadd >h2=float64#21,<sr3low=float64#26,<x4=float64#7,<h2=float64#21
; asm 2: fmadd >h2=f20,<sr3low=f25,<x4=f6,<h2=f20
fmadd f20,f25,f6,f20

; qhasm:   h5 += sr3high * x6
; asm 1: fmadd >h5=float64#11,<sr3high=float64#25,<x6=float64#3,<h5=float64#11
; asm 2: fmadd >h5=f10,<sr3high=f24,<x6=f2,<h5=f10
fmadd f10,f24,f2,f10

; qhasm:   sr1high = sr1high_stack
; asm 1: lfd >sr1high=float64#25,<sr1high_stack=stack64#19
; asm 2: lfd >sr1high=f24,<sr1high_stack=224(r1)
lfd f24,224(r1)

; qhasm:   h4 += sr3low * x6
; asm 1: fmadd >h4=float64#9,<sr3low=float64#26,<x6=float64#3,<h4=float64#27
; asm 2: fmadd >h4=f8,<sr3low=f25,<x6=f2,<h4=f26
fmadd f8,f25,f2,f26

; qhasm:   sr1low = sr1low_stack
; asm 1: lfd >sr1low=float64#26,<sr1low_stack=stack64#21
; asm 2: lfd >sr1low=f25,<sr1low_stack=240(r1)
lfd f25,240(r1)

; qhasm:   h1 += sr2high * x4
; asm 1: fmadd >h1=float64#27,<sr2high=float64#4,<x4=float64#7,<h1=float64#5
; asm 2: fmadd >h1=f26,<sr2high=f3,<x4=f6,<h1=f4
fmadd f26,f3,f6,f4

; qhasm:   alpha0 = *(float64 *) (constants + 24)
; asm 1: lfd >alpha0=float64#28,24(<constants=int32#6)
; asm 2: lfd >alpha0=f27,24(<constants=r8)
lfd f27,24(r8)

; qhasm:   h0 += sr2low * x4
; asm 1: fmadd >h0=float64#2,<sr2low=float64#24,<x4=float64#7,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr2low=f23,<x4=f6,<h0=f1
fmadd f1,f23,f6,f1

; qhasm:   z3 = d3
; asm 1: lfd >z3=float64#7,<d3=stack64#28
; asm 2: lfd >z3=f6,<d3=296(r1)
lfd f6,296(r1)

; qhasm:   h3 += sr2high * x6
; asm 1: fmadd >h3=float64#4,<sr2high=float64#4,<x6=float64#3,<h3=float64#23
; asm 2: fmadd >h3=f3,<sr2high=f3,<x6=f2,<h3=f22
fmadd f3,f3,f2,f22

; qhasm:   z2 = d2
; asm 1: lfd >z2=float64#23,<d2=stack64#27
; asm 2: lfd >z2=f22,<d2=288(r1)
lfd f22,288(r1)

; qhasm:   h2 += sr2low * x6
; asm 1: fmadd >h2=float64#5,<sr2low=float64#24,<x6=float64#3,<h2=float64#21
; asm 2: fmadd >h2=f4,<sr2low=f23,<x6=f2,<h2=f20
fmadd f4,f23,f2,f20

; qhasm:   z1 = d1
; asm 1: lfd >z1=float64#21,<d1=stack64#26
; asm 2: lfd >z1=f20,<d1=280(r1)
lfd f20,280(r1)

; qhasm:   h1 += sr1high * x6
; asm 1: fmadd >h1=float64#24,<sr1high=float64#25,<x6=float64#3,<h1=float64#27
; asm 2: fmadd >h1=f23,<sr1high=f24,<x6=f2,<h1=f26
fmadd f23,f24,f2,f26

; qhasm:   z0 = d0
; asm 1: lfd >z0=float64#25,<d0=stack64#25
; asm 2: lfd >z0=f24,<d0=272(r1)
lfd f24,272(r1)

; qhasm:   h0 += sr1low * x6
; asm 1: fmadd >h0=float64#2,<sr1low=float64#26,<x6=float64#3,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr1low=f25,<x6=f2,<h0=f1
fmadd f1,f25,f2,f1

; qhasm:   z3 -= alpha96
; asm 1: fsub >z3=float64#3,<z3=float64#7,<alpha96=float64#19
; asm 2: fsub >z3=f2,<z3=f6,<alpha96=f18
fsub f2,f6,f18

; qhasm:   z2 -= alpha64
; asm 1: fsub >z2=float64#23,<z2=float64#23,<alpha64=float64#6
; asm 2: fsub >z2=f22,<z2=f22,<alpha64=f5
fsub f22,f22,f5

; qhasm:   z1 -= alpha32
; asm 1: fsub >z1=float64#21,<z1=float64#21,<alpha32=float64#1
; asm 2: fsub >z1=f20,<z1=f20,<alpha32=f0
fsub f20,f20,f0

; qhasm:   z0 -= alpha0
; asm 1: fsub >z0=float64#25,<z0=float64#25,<alpha0=float64#28
; asm 2: fsub >z0=f24,<z0=f24,<alpha0=f27
fsub f24,f24,f27

; qhasm:   h5 += z3
; asm 1: fadd >h5=float64#7,<h5=float64#11,<z3=float64#3
; asm 2: fadd >h5=f6,<h5=f10,<z3=f2
fadd f6,f10,f2

; qhasm:   h3 += z2
; asm 1: fadd >h3=float64#4,<h3=float64#4,<z2=float64#23
; asm 2: fadd >h3=f3,<h3=f3,<z2=f22
fadd f3,f3,f22

; qhasm:   h1 += z1
; asm 1: fadd >h1=float64#3,<h1=float64#24,<z1=float64#21
; asm 2: fadd >h1=f2,<h1=f23,<z1=f20
fadd f2,f23,f20

; qhasm:   h0 += z0
; asm 1: fadd >h0=float64#2,<h0=float64#2,<z0=float64#25
; asm 2: fadd >h0=f1,<h0=f1,<z0=f24
fadd f1,f1,f24

; qhasm: goto multiplyaddatleast16bytes if !<
bge .label.multiplyaddatleast16bytes

; qhasm: multiplyaddatmost15bytes:
.label.multiplyaddatmost15bytes:

; qhasm:   y1 = h1 + alpha32
; asm 1: fadd >y1=float64#11,<h1=float64#3,<alpha32=float64#1
; asm 2: fadd >y1=f10,<h1=f2,<alpha32=f0
fadd f10,f2,f0

; qhasm:   y0 = h0 + alpha32
; asm 1: fadd >y0=float64#21,<h0=float64#2,<alpha32=float64#1
; asm 2: fadd >y0=f20,<h0=f1,<alpha32=f0
fadd f20,f1,f0

; qhasm:   y7 = h7 + alpha130
; asm 1: fadd >y7=float64#23,<h7=float64#15,<alpha130=float64#29
; asm 2: fadd >y7=f22,<h7=f14,<alpha130=f28
fadd f22,f14,f28

; qhasm:   y6 = h6 + alpha130
; asm 1: fadd >y6=float64#24,<h6=float64#13,<alpha130=float64#29
; asm 2: fadd >y6=f23,<h6=f12,<alpha130=f28
fadd f23,f12,f28

; qhasm:   y5 = h5 + alpha96
; asm 1: fadd >y5=float64#25,<h5=float64#7,<alpha96=float64#19
; asm 2: fadd >y5=f24,<h5=f6,<alpha96=f18
fadd f24,f6,f18

; qhasm:   y4 = h4 + alpha96
; asm 1: fadd >y4=float64#26,<h4=float64#9,<alpha96=float64#19
; asm 2: fadd >y4=f25,<h4=f8,<alpha96=f18
fadd f25,f8,f18

; qhasm:   y3 = h3 + alpha64
; asm 1: fadd >y3=float64#27,<h3=float64#4,<alpha64=float64#6
; asm 2: fadd >y3=f26,<h3=f3,<alpha64=f5
fadd f26,f3,f5

; qhasm:   y2 = h2 + alpha64
; asm 1: fadd >y2=float64#28,<h2=float64#5,<alpha64=float64#6
; asm 2: fadd >y2=f27,<h2=f4,<alpha64=f5
fadd f27,f4,f5

; qhasm:   y1 -= alpha32
; asm 1: fsub >y1=float64#11,<y1=float64#11,<alpha32=float64#1
; asm 2: fsub >y1=f10,<y1=f10,<alpha32=f0
fsub f10,f10,f0

; qhasm:   y0 -= alpha32
; asm 1: fsub >y0=float64#21,<y0=float64#21,<alpha32=float64#1
; asm 2: fsub >y0=f20,<y0=f20,<alpha32=f0
fsub f20,f20,f0

; qhasm:   y7 -= alpha130
; asm 1: fsub >y7=float64#23,<y7=float64#23,<alpha130=float64#29
; asm 2: fsub >y7=f22,<y7=f22,<alpha130=f28
fsub f22,f22,f28

; qhasm:   y6 -= alpha130
; asm 1: fsub >y6=float64#24,<y6=float64#24,<alpha130=float64#29
; asm 2: fsub >y6=f23,<y6=f23,<alpha130=f28
fsub f23,f23,f28

; qhasm:   y5 -= alpha96
; asm 1: fsub >y5=float64#25,<y5=float64#25,<alpha96=float64#19
; asm 2: fsub >y5=f24,<y5=f24,<alpha96=f18
fsub f24,f24,f18

; qhasm:   y4 -= alpha96
; asm 1: fsub >y4=float64#26,<y4=float64#26,<alpha96=float64#19
; asm 2: fsub >y4=f25,<y4=f25,<alpha96=f18
fsub f25,f25,f18

; qhasm:   y3 -= alpha64
; asm 1: fsub >y3=float64#27,<y3=float64#27,<alpha64=float64#6
; asm 2: fsub >y3=f26,<y3=f26,<alpha64=f5
fsub f26,f26,f5

; qhasm:   y2 -= alpha64
; asm 1: fsub >y2=float64#28,<y2=float64#28,<alpha64=float64#6
; asm 2: fsub >y2=f27,<y2=f27,<alpha64=f5
fsub f27,f27,f5

; qhasm:   x1 = h1 - y1
; asm 1: fsub >x1=float64#3,<h1=float64#3,<y1=float64#11
; asm 2: fsub >x1=f2,<h1=f2,<y1=f10
fsub f2,f2,f10

; qhasm:   x0 = h0 - y0
; asm 1: fsub >x0=float64#2,<h0=float64#2,<y0=float64#21
; asm 2: fsub >x0=f1,<h0=f1,<y0=f20
fsub f1,f1,f20

; qhasm:   x7 = h7 - y7
; asm 1: fsub >x7=float64#15,<h7=float64#15,<y7=float64#23
; asm 2: fsub >x7=f14,<h7=f14,<y7=f22
fsub f14,f14,f22

; qhasm:   x6 = h6 - y6
; asm 1: fsub >x6=float64#13,<h6=float64#13,<y6=float64#24
; asm 2: fsub >x6=f12,<h6=f12,<y6=f23
fsub f12,f12,f23

; qhasm:   x5 = h5 - y5
; asm 1: fsub >x5=float64#7,<h5=float64#7,<y5=float64#25
; asm 2: fsub >x5=f6,<h5=f6,<y5=f24
fsub f6,f6,f24

; qhasm:   x4 = h4 - y4
; asm 1: fsub >x4=float64#9,<h4=float64#9,<y4=float64#26
; asm 2: fsub >x4=f8,<h4=f8,<y4=f25
fsub f8,f8,f25

; qhasm:   x3 = h3 - y3
; asm 1: fsub >x3=float64#4,<h3=float64#4,<y3=float64#27
; asm 2: fsub >x3=f3,<h3=f3,<y3=f26
fsub f3,f3,f26

; qhasm:   x2 = h2 - y2
; asm 1: fsub >x2=float64#5,<h2=float64#5,<y2=float64#28
; asm 2: fsub >x2=f4,<h2=f4,<y2=f27
fsub f4,f4,f27

; qhasm:   x1 += y7 * scale
; asm 1: fmadd >x1=float64#3,<y7=float64#23,<scale=float64#18,<x1=float64#3
; asm 2: fmadd >x1=f2,<y7=f22,<scale=f17,<x1=f2
fmadd f2,f22,f17,f2

; qhasm:   x0 += y6 * scale
; asm 1: fmadd >x0=float64#2,<y6=float64#24,<scale=float64#18,<x0=float64#2
; asm 2: fmadd >x0=f1,<y6=f23,<scale=f17,<x0=f1
fmadd f1,f23,f17,f1

; qhasm:   x7 += y5
; asm 1: fadd >x7=float64#15,<x7=float64#15,<y5=float64#25
; asm 2: fadd >x7=f14,<x7=f14,<y5=f24
fadd f14,f14,f24

; qhasm:   x6 += y4
; asm 1: fadd >x6=float64#13,<x6=float64#13,<y4=float64#26
; asm 2: fadd >x6=f12,<x6=f12,<y4=f25
fadd f12,f12,f25

; qhasm:   x5 += y3
; asm 1: fadd >x5=float64#7,<x5=float64#7,<y3=float64#27
; asm 2: fadd >x5=f6,<x5=f6,<y3=f26
fadd f6,f6,f26

; qhasm:   x4 += y2
; asm 1: fadd >x4=float64#9,<x4=float64#9,<y2=float64#28
; asm 2: fadd >x4=f8,<x4=f8,<y2=f27
fadd f8,f8,f27

; qhasm:   x3 += y1
; asm 1: fadd >x3=float64#4,<x3=float64#4,<y1=float64#11
; asm 2: fadd >x3=f3,<x3=f3,<y1=f10
fadd f3,f3,f10

; qhasm:   x2 += y0
; asm 1: fadd >x2=float64#5,<x2=float64#5,<y0=float64#21
; asm 2: fadd >x2=f4,<x2=f4,<y0=f20
fadd f4,f4,f20

; qhasm:   x0 += x1
; asm 1: fadd >x0=float64#2,<x0=float64#2,<x1=float64#3
; asm 2: fadd >x0=f1,<x0=f1,<x1=f2
fadd f1,f1,f2

; qhasm:   x6 += x7
; asm 1: fadd >x6=float64#21,<x6=float64#13,<x7=float64#15
; asm 2: fadd >x6=f20,<x6=f12,<x7=f14
fadd f20,f12,f14

; qhasm:   x4 += x5
; asm 1: fadd >x4=float64#3,<x4=float64#9,<x5=float64#7
; asm 2: fadd >x4=f2,<x4=f8,<x5=f6
fadd f2,f8,f6

; qhasm:   x2 += x3
; asm 1: fadd >x2=float64#4,<x2=float64#5,<x3=float64#4
; asm 2: fadd >x2=f3,<x2=f4,<x3=f3
fadd f3,f4,f3

; qhasm:   h7 = r3high * x0
; asm 1: fmul >h7=float64#5,<r3high=float64#22,<x0=float64#2
; asm 2: fmul >h7=f4,<r3high=f21,<x0=f1
fmul f4,f21,f1

; qhasm:   h6 = r3low * x0
; asm 1: fmul >h6=float64#7,<r3low=float64#20,<x0=float64#2
; asm 2: fmul >h6=f6,<r3low=f19,<x0=f1
fmul f6,f19,f1

; qhasm:   h5 = r2high * x0
; asm 1: fmul >h5=float64#9,<r2high=float64#17,<x0=float64#2
; asm 2: fmul >h5=f8,<r2high=f16,<x0=f1
fmul f8,f16,f1

; qhasm:   h4 = r2low * x0
; asm 1: fmul >h4=float64#11,<r2low=float64#14,<x0=float64#2
; asm 2: fmul >h4=f10,<r2low=f13,<x0=f1
fmul f10,f13,f1

; qhasm:   h3 = r1high * x0
; asm 1: fmul >h3=float64#13,<r1high=float64#16,<x0=float64#2
; asm 2: fmul >h3=f12,<r1high=f15,<x0=f1
fmul f12,f15,f1

; qhasm:   h2 = r1low * x0
; asm 1: fmul >h2=float64#15,<r1low=float64#12,<x0=float64#2
; asm 2: fmul >h2=f14,<r1low=f11,<x0=f1
fmul f14,f11,f1

; qhasm:   h1 = r0high * x0
; asm 1: fmul >h1=float64#23,<r0high=float64#8,<x0=float64#2
; asm 2: fmul >h1=f22,<r0high=f7,<x0=f1
fmul f22,f7,f1

; qhasm:   h0 = r0low * x0
; asm 1: fmul >h0=float64#2,<r0low=float64#10,<x0=float64#2
; asm 2: fmul >h0=f1,<r0low=f9,<x0=f1
fmul f1,f9,f1

; qhasm:   h7 += r2high * x2
; asm 1: fmadd >h7=float64#5,<r2high=float64#17,<x2=float64#4,<h7=float64#5
; asm 2: fmadd >h7=f4,<r2high=f16,<x2=f3,<h7=f4
fmadd f4,f16,f3,f4

; qhasm:   h6 += r2low * x2
; asm 1: fmadd >h6=float64#7,<r2low=float64#14,<x2=float64#4,<h6=float64#7
; asm 2: fmadd >h6=f6,<r2low=f13,<x2=f3,<h6=f6
fmadd f6,f13,f3,f6

; qhasm:   h5 += r1high * x2
; asm 1: fmadd >h5=float64#9,<r1high=float64#16,<x2=float64#4,<h5=float64#9
; asm 2: fmadd >h5=f8,<r1high=f15,<x2=f3,<h5=f8
fmadd f8,f15,f3,f8

; qhasm:   h4 += r1low * x2
; asm 1: fmadd >h4=float64#11,<r1low=float64#12,<x2=float64#4,<h4=float64#11
; asm 2: fmadd >h4=f10,<r1low=f11,<x2=f3,<h4=f10
fmadd f10,f11,f3,f10

; qhasm:   h3 += r0high * x2
; asm 1: fmadd >h3=float64#24,<r0high=float64#8,<x2=float64#4,<h3=float64#13
; asm 2: fmadd >h3=f23,<r0high=f7,<x2=f3,<h3=f12
fmadd f23,f7,f3,f12

; qhasm:   h2 += r0low * x2
; asm 1: fmadd >h2=float64#25,<r0low=float64#10,<x2=float64#4,<h2=float64#15
; asm 2: fmadd >h2=f24,<r0low=f9,<x2=f3,<h2=f14
fmadd f24,f9,f3,f14

; qhasm:   h7 += r1high * x4
; asm 1: fmadd >h7=float64#5,<r1high=float64#16,<x4=float64#3,<h7=float64#5
; asm 2: fmadd >h7=f4,<r1high=f15,<x4=f2,<h7=f4
fmadd f4,f15,f2,f4

; qhasm:   h6 += r1low * x4
; asm 1: fmadd >h6=float64#7,<r1low=float64#12,<x4=float64#3,<h6=float64#7
; asm 2: fmadd >h6=f6,<r1low=f11,<x4=f2,<h6=f6
fmadd f6,f11,f2,f6

; qhasm:   sr3high = sr3high_stack
; asm 1: lfd >sr3high=float64#26,<sr3high_stack=stack64#23
; asm 2: lfd >sr3high=f25,<sr3high_stack=256(r1)
lfd f25,256(r1)

; qhasm:   h5 += r0high * x4
; asm 1: fmadd >h5=float64#9,<r0high=float64#8,<x4=float64#3,<h5=float64#9
; asm 2: fmadd >h5=f8,<r0high=f7,<x4=f2,<h5=f8
fmadd f8,f7,f2,f8

; qhasm:   sr3low = sr3low_stack
; asm 1: lfd >sr3low=float64#27,<sr3low_stack=stack64#24
; asm 2: lfd >sr3low=f26,<sr3low_stack=264(r1)
lfd f26,264(r1)

; qhasm:   h4 += r0low * x4
; asm 1: fmadd >h4=float64#28,<r0low=float64#10,<x4=float64#3,<h4=float64#11
; asm 2: fmadd >h4=f27,<r0low=f9,<x4=f2,<h4=f10
fmadd f27,f9,f2,f10

; qhasm:   h7 += r0high * x6
; asm 1: fmadd >h7=float64#15,<r0high=float64#8,<x6=float64#21,<h7=float64#5
; asm 2: fmadd >h7=f14,<r0high=f7,<x6=f20,<h7=f4
fmadd f14,f7,f20,f4

; qhasm:   h6 += r0low * x6
; asm 1: fmadd >h6=float64#13,<r0low=float64#10,<x6=float64#21,<h6=float64#7
; asm 2: fmadd >h6=f12,<r0low=f9,<x6=f20,<h6=f6
fmadd f12,f9,f20,f6

; qhasm:   h1 += sr3high * x2
; asm 1: fmadd >h1=float64#5,<sr3high=float64#26,<x2=float64#4,<h1=float64#23
; asm 2: fmadd >h1=f4,<sr3high=f25,<x2=f3,<h1=f22
fmadd f4,f25,f3,f22

; qhasm:   h0 += sr3low * x2
; asm 1: fmadd >h0=float64#2,<sr3low=float64#27,<x2=float64#4,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr3low=f26,<x2=f3,<h0=f1
fmadd f1,f26,f3,f1

; qhasm:   sr2high = sr2high_stack
; asm 1: lfd >sr2high=float64#4,<sr2high_stack=stack64#20
; asm 2: lfd >sr2high=f3,<sr2high_stack=232(r1)
lfd f3,232(r1)

; qhasm:   h3 += sr3high * x4
; asm 1: fmadd >h3=float64#7,<sr3high=float64#26,<x4=float64#3,<h3=float64#24
; asm 2: fmadd >h3=f6,<sr3high=f25,<x4=f2,<h3=f23
fmadd f6,f25,f2,f23

; qhasm:   sr2low = sr2low_stack
; asm 1: lfd >sr2low=float64#23,<sr2low_stack=stack64#22
; asm 2: lfd >sr2low=f22,<sr2low_stack=248(r1)
lfd f22,248(r1)

; qhasm:   h2 += sr3low * x4
; asm 1: fmadd >h2=float64#24,<sr3low=float64#27,<x4=float64#3,<h2=float64#25
; asm 2: fmadd >h2=f23,<sr3low=f26,<x4=f2,<h2=f24
fmadd f23,f26,f2,f24

; qhasm:   h5 += sr3high * x6
; asm 1: fmadd >h5=float64#11,<sr3high=float64#26,<x6=float64#21,<h5=float64#9
; asm 2: fmadd >h5=f10,<sr3high=f25,<x6=f20,<h5=f8
fmadd f10,f25,f20,f8

; qhasm:   sr1high = sr1high_stack
; asm 1: lfd >sr1high=float64#25,<sr1high_stack=stack64#19
; asm 2: lfd >sr1high=f24,<sr1high_stack=224(r1)
lfd f24,224(r1)

; qhasm:   h4 += sr3low * x6
; asm 1: fmadd >h4=float64#9,<sr3low=float64#27,<x6=float64#21,<h4=float64#28
; asm 2: fmadd >h4=f8,<sr3low=f26,<x6=f20,<h4=f27
fmadd f8,f26,f20,f27

; qhasm:   sr1low = sr1low_stack
; asm 1: lfd >sr1low=float64#26,<sr1low_stack=stack64#21
; asm 2: lfd >sr1low=f25,<sr1low_stack=240(r1)
lfd f25,240(r1)

; qhasm:   h1 += sr2high * x4
; asm 1: fmadd >h1=float64#27,<sr2high=float64#4,<x4=float64#3,<h1=float64#5
; asm 2: fmadd >h1=f26,<sr2high=f3,<x4=f2,<h1=f4
fmadd f26,f3,f2,f4

; qhasm:   h0 += sr2low * x4
; asm 1: fmadd >h0=float64#2,<sr2low=float64#23,<x4=float64#3,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr2low=f22,<x4=f2,<h0=f1
fmadd f1,f22,f2,f1

; qhasm:   h3 += sr2high * x6
; asm 1: fmadd >h3=float64#7,<sr2high=float64#4,<x6=float64#21,<h3=float64#7
; asm 2: fmadd >h3=f6,<sr2high=f3,<x6=f20,<h3=f6
fmadd f6,f3,f20,f6

; qhasm:   h2 += sr2low * x6
; asm 1: fmadd >h2=float64#5,<sr2low=float64#23,<x6=float64#21,<h2=float64#24
; asm 2: fmadd >h2=f4,<sr2low=f22,<x6=f20,<h2=f23
fmadd f4,f22,f20,f23

; qhasm:   h1 += sr1high * x6
; asm 1: fmadd >h1=float64#3,<sr1high=float64#25,<x6=float64#21,<h1=float64#27
; asm 2: fmadd >h1=f2,<sr1high=f24,<x6=f20,<h1=f26
fmadd f2,f24,f20,f26

; qhasm:   h0 += sr1low * x6
; asm 1: fmadd >h0=float64#2,<sr1low=float64#26,<x6=float64#21,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr1low=f25,<x6=f20,<h0=f1
fmadd f1,f25,f20,f1

; qhasm: addatmost15bytes:
.label.addatmost15bytes:

; qhasm: =? (uint32) l - 0
; asm 1: cmplwi <l=int32#5,0
; asm 2: cmplwi <l=r7,0
cmplwi r7,0

; qhasm:   lbelow2 = l - 2
; asm 1: addi >lbelow2=int32#2,<l=int32#5,-2
; asm 2: addi >lbelow2=r4,<l=r7,-2
addi r4,r7,-2

; qhasm:   lbelow3 = l - 3
; asm 1: addi >lbelow3=int32#7,<l=int32#5,-3
; asm 2: addi >lbelow3=r9,<l=r7,-3
addi r9,r7,-3

; qhasm:   (int32) lbelow2 >>= 31
; asm 1: srawi >lbelow2=int32#2,<lbelow2=int32#2,31
; asm 2: srawi >lbelow2=r4,<lbelow2=r4,31
srawi r4,r4,31

; qhasm:   lbelow4 = l - 4
; asm 1: addi >lbelow4=int32#8,<l=int32#5,-4
; asm 2: addi >lbelow4=r10,<l=r7,-4
addi r10,r7,-4

; qhasm: goto nomorebytes if =
beq .label.nomorebytes

; qhasm:   m00 = *(uint8 *) (m + 0)
; asm 1: lbz >m00=int32#9,0(<m=int32#4)
; asm 2: lbz >m00=r11,0(<m=r6)
lbz r11,0(r6)

; qhasm:   (int32) lbelow3 >>= 31
; asm 1: srawi >lbelow3=int32#7,<lbelow3=int32#7,31
; asm 2: srawi >lbelow3=r9,<lbelow3=r9,31
srawi r9,r9,31

; qhasm:   m += lbelow2
; asm 1: add >m=int32#4,<m=int32#4,<lbelow2=int32#2
; asm 2: add >m=r6,<m=r6,<lbelow2=r4
add r6,r6,r4

; qhasm:   m01 = *(uint8 *) (m + 1)
; asm 1: lbz >m01=int32#10,1(<m=int32#4)
; asm 2: lbz >m01=r12,1(<m=r6)
lbz r12,1(r6)

; qhasm:   (int32) lbelow4 >>= 31
; asm 1: srawi >lbelow4=int32#8,<lbelow4=int32#8,31
; asm 2: srawi >lbelow4=r10,<lbelow4=r10,31
srawi r10,r10,31

; qhasm:   m += lbelow3
; asm 1: add >m=int32#4,<m=int32#4,<lbelow3=int32#7
; asm 2: add >m=r6,<m=r6,<lbelow3=r9
add r6,r6,r9

; qhasm:   m02 = *(uint8 *) (m + 2)
; asm 1: lbz >m02=int32#11,2(<m=int32#4)
; asm 2: lbz >m02=r13,2(<m=r6)
lbz r13,2(r6)

; qhasm:   m += lbelow4
; asm 1: add >m=int32#4,<m=int32#4,<lbelow4=int32#8
; asm 2: add >m=r6,<m=r6,<lbelow4=r10
add r6,r6,r10

; qhasm:   m0 = 0
; asm 1: li >m0=int32#12,0
; asm 2: li >m0=r14,0
li r14,0

; qhasm:   m03 = *(uint8 *) (m + 3)
; asm 1: lbz >m03=int32#13,3(<m=int32#4)
; asm 2: lbz >m03=r15,3(<m=r6)
lbz r15,3(r6)

; qhasm:   m1 = 0
; asm 1: li >m1=int32#14,0
; asm 2: li >m1=r16,0
li r16,0

; qhasm:   m0 += m00
; asm 1: add >m0=int32#9,<m0=int32#12,<m00=int32#9
; asm 2: add >m0=r11,<m0=r14,<m00=r11
add r11,r14,r11

; qhasm:   m01 &= ~lbelow2
; asm 1: andc >m01=int32#10,<m01=int32#10,<lbelow2=int32#2
; asm 2: andc >m01=r12,<m01=r12,<lbelow2=r4
andc r12,r12,r4

; qhasm:   m02 &= ~lbelow3
; asm 1: andc >m02=int32#11,<m02=int32#11,<lbelow3=int32#7
; asm 2: andc >m02=r13,<m02=r13,<lbelow3=r9
andc r13,r13,r9

; qhasm:   m01 -= lbelow2
; asm 1: subf >m01=int32#10,<lbelow2=int32#2,<m01=int32#10
; asm 2: subf >m01=r12,<lbelow2=r4,<m01=r12
subf r12,r4,r12

; qhasm:   m01 <<= 8
; asm 1: slwi >m01=int32#10,<m01=int32#10,8
; asm 2: slwi >m01=r12,<m01=r12,8
slwi r12,r12,8

; qhasm:   m03 &= ~lbelow4
; asm 1: andc >m03=int32#12,<m03=int32#13,<lbelow4=int32#8
; asm 2: andc >m03=r14,<m03=r15,<lbelow4=r10
andc r14,r15,r10

; qhasm:   m0 += m01
; asm 1: add >m0=int32#9,<m0=int32#9,<m01=int32#10
; asm 2: add >m0=r11,<m0=r11,<m01=r12
add r11,r11,r12

; qhasm:   lbelow2 -= lbelow3
; asm 1: subf >lbelow2=int32#2,<lbelow3=int32#7,<lbelow2=int32#2
; asm 2: subf >lbelow2=r4,<lbelow3=r9,<lbelow2=r4
subf r4,r9,r4

; qhasm:   m02 += lbelow2
; asm 1: add >m02=int32#2,<m02=int32#11,<lbelow2=int32#2
; asm 2: add >m02=r4,<m02=r13,<lbelow2=r4
add r4,r13,r4

; qhasm:   lbelow3 -= lbelow4
; asm 1: subf >lbelow3=int32#7,<lbelow4=int32#8,<lbelow3=int32#7
; asm 2: subf >lbelow3=r9,<lbelow4=r10,<lbelow3=r9
subf r9,r10,r9

; qhasm:   m02 <<= 16
; asm 1: slwi >m02=int32#2,<m02=int32#2,16
; asm 2: slwi >m02=r4,<m02=r4,16
slwi r4,r4,16

; qhasm:   m03 += lbelow3
; asm 1: add >m03=int32#7,<m03=int32#12,<lbelow3=int32#7
; asm 2: add >m03=r9,<m03=r14,<lbelow3=r9
add r9,r14,r9

; qhasm:   m03 <<= 24
; asm 1: slwi >m03=int32#7,<m03=int32#7,24
; asm 2: slwi >m03=r9,<m03=r9,24
slwi r9,r9,24

; qhasm:   m0 += m02
; asm 1: add >m0=int32#2,<m0=int32#9,<m02=int32#2
; asm 2: add >m0=r4,<m0=r11,<m02=r4
add r4,r11,r4

; qhasm:   m0 += m03
; asm 1: add >m0=int32#2,<m0=int32#2,<m03=int32#7
; asm 2: add >m0=r4,<m0=r4,<m03=r9
add r4,r4,r9

; qhasm:   lbelow5 = l - 5
; asm 1: addi >lbelow5=int32#7,<l=int32#5,-5
; asm 2: addi >lbelow5=r9,<l=r7,-5
addi r9,r7,-5

; qhasm:   lbelow6 = l - 6
; asm 1: addi >lbelow6=int32#9,<l=int32#5,-6
; asm 2: addi >lbelow6=r11,<l=r7,-6
addi r11,r7,-6

; qhasm:   lbelow7 = l - 7
; asm 1: addi >lbelow7=int32#10,<l=int32#5,-7
; asm 2: addi >lbelow7=r12,<l=r7,-7
addi r12,r7,-7

; qhasm:   (int32) lbelow5 >>= 31
; asm 1: srawi >lbelow5=int32#7,<lbelow5=int32#7,31
; asm 2: srawi >lbelow5=r9,<lbelow5=r9,31
srawi r9,r9,31

; qhasm:   lbelow8 = l - 8
; asm 1: addi >lbelow8=int32#11,<l=int32#5,-8
; asm 2: addi >lbelow8=r13,<l=r7,-8
addi r13,r7,-8

; qhasm:   (int32) lbelow6 >>= 31
; asm 1: srawi >lbelow6=int32#9,<lbelow6=int32#9,31
; asm 2: srawi >lbelow6=r11,<lbelow6=r11,31
srawi r11,r11,31

; qhasm:   m += lbelow5
; asm 1: add >m=int32#4,<m=int32#4,<lbelow5=int32#7
; asm 2: add >m=r6,<m=r6,<lbelow5=r9
add r6,r6,r9

; qhasm:   m10 = *(uint8 *) (m + 4)
; asm 1: lbz >m10=int32#12,4(<m=int32#4)
; asm 2: lbz >m10=r14,4(<m=r6)
lbz r14,4(r6)

; qhasm:   (int32) lbelow7 >>= 31
; asm 1: srawi >lbelow7=int32#10,<lbelow7=int32#10,31
; asm 2: srawi >lbelow7=r12,<lbelow7=r12,31
srawi r12,r12,31

; qhasm:   m += lbelow6
; asm 1: add >m=int32#4,<m=int32#4,<lbelow6=int32#9
; asm 2: add >m=r6,<m=r6,<lbelow6=r11
add r6,r6,r11

; qhasm:   m11 = *(uint8 *) (m + 5)
; asm 1: lbz >m11=int32#13,5(<m=int32#4)
; asm 2: lbz >m11=r15,5(<m=r6)
lbz r15,5(r6)

; qhasm:   (int32) lbelow8 >>= 31
; asm 1: srawi >lbelow8=int32#11,<lbelow8=int32#11,31
; asm 2: srawi >lbelow8=r13,<lbelow8=r13,31
srawi r13,r13,31

; qhasm:   m += lbelow7
; asm 1: add >m=int32#4,<m=int32#4,<lbelow7=int32#10
; asm 2: add >m=r6,<m=r6,<lbelow7=r12
add r6,r6,r12

; qhasm:   m12 = *(uint8 *) (m + 6)
; asm 1: lbz >m12=int32#15,6(<m=int32#4)
; asm 2: lbz >m12=r17,6(<m=r6)
lbz r17,6(r6)

; qhasm:   m += lbelow8
; asm 1: add >m=int32#4,<m=int32#4,<lbelow8=int32#11
; asm 2: add >m=r6,<m=r6,<lbelow8=r13
add r6,r6,r13

; qhasm:   m13 = *(uint8 *) (m + 7)
; asm 1: lbz >m13=int32#16,7(<m=int32#4)
; asm 2: lbz >m13=r18,7(<m=r6)
lbz r18,7(r6)

; qhasm:   m10 &= ~lbelow5
; asm 1: andc >m10=int32#12,<m10=int32#12,<lbelow5=int32#7
; asm 2: andc >m10=r14,<m10=r14,<lbelow5=r9
andc r14,r14,r9

; qhasm:   lbelow4 -= lbelow5
; asm 1: subf >lbelow4=int32#8,<lbelow5=int32#7,<lbelow4=int32#8
; asm 2: subf >lbelow4=r10,<lbelow5=r9,<lbelow4=r10
subf r10,r9,r10

; qhasm:   m10 += lbelow4
; asm 1: add >m10=int32#8,<m10=int32#12,<lbelow4=int32#8
; asm 2: add >m10=r10,<m10=r14,<lbelow4=r10
add r10,r14,r10

; qhasm:   lbelow5 -= lbelow6
; asm 1: subf >lbelow5=int32#7,<lbelow6=int32#9,<lbelow5=int32#7
; asm 2: subf >lbelow5=r9,<lbelow6=r11,<lbelow5=r9
subf r9,r11,r9

; qhasm:   m11 &= ~lbelow6
; asm 1: andc >m11=int32#12,<m11=int32#13,<lbelow6=int32#9
; asm 2: andc >m11=r14,<m11=r15,<lbelow6=r11
andc r14,r15,r11

; qhasm:   m11 += lbelow5
; asm 1: add >m11=int32#7,<m11=int32#12,<lbelow5=int32#7
; asm 2: add >m11=r9,<m11=r14,<lbelow5=r9
add r9,r14,r9

; qhasm:   m11 <<= 8
; asm 1: slwi >m11=int32#7,<m11=int32#7,8
; asm 2: slwi >m11=r9,<m11=r9,8
slwi r9,r9,8

; qhasm:   m1 += m10
; asm 1: add >m1=int32#8,<m1=int32#14,<m10=int32#8
; asm 2: add >m1=r10,<m1=r16,<m10=r10
add r10,r16,r10

; qhasm:   m1 += m11
; asm 1: add >m1=int32#7,<m1=int32#8,<m11=int32#7
; asm 2: add >m1=r9,<m1=r10,<m11=r9
add r9,r10,r9

; qhasm:   m12 &= ~lbelow7
; asm 1: andc >m12=int32#8,<m12=int32#15,<lbelow7=int32#10
; asm 2: andc >m12=r10,<m12=r17,<lbelow7=r12
andc r10,r17,r12

; qhasm:   lbelow6 -= lbelow7
; asm 1: subf >lbelow6=int32#9,<lbelow7=int32#10,<lbelow6=int32#9
; asm 2: subf >lbelow6=r11,<lbelow7=r12,<lbelow6=r11
subf r11,r12,r11

; qhasm:   m13 &= ~lbelow8
; asm 1: andc >m13=int32#12,<m13=int32#16,<lbelow8=int32#11
; asm 2: andc >m13=r14,<m13=r18,<lbelow8=r13
andc r14,r18,r13

; qhasm:   m12 += lbelow6
; asm 1: add >m12=int32#8,<m12=int32#8,<lbelow6=int32#9
; asm 2: add >m12=r10,<m12=r10,<lbelow6=r11
add r10,r10,r11

; qhasm:   lbelow7 -= lbelow8
; asm 1: subf >lbelow7=int32#9,<lbelow8=int32#11,<lbelow7=int32#10
; asm 2: subf >lbelow7=r11,<lbelow8=r13,<lbelow7=r12
subf r11,r13,r12

; qhasm:   m12 <<= 16
; asm 1: slwi >m12=int32#8,<m12=int32#8,16
; asm 2: slwi >m12=r10,<m12=r10,16
slwi r10,r10,16

; qhasm:   m13 += lbelow7
; asm 1: add >m13=int32#9,<m13=int32#12,<lbelow7=int32#9
; asm 2: add >m13=r11,<m13=r14,<lbelow7=r11
add r11,r14,r11

; qhasm:   m13 <<= 24
; asm 1: slwi >m13=int32#9,<m13=int32#9,24
; asm 2: slwi >m13=r11,<m13=r11,24
slwi r11,r11,24

; qhasm:   m1 += m12
; asm 1: add >m1=int32#7,<m1=int32#7,<m12=int32#8
; asm 2: add >m1=r9,<m1=r9,<m12=r10
add r9,r9,r10

; qhasm:   m1 += m13
; asm 1: add >m1=int32#7,<m1=int32#7,<m13=int32#9
; asm 2: add >m1=r9,<m1=r9,<m13=r11
add r9,r9,r11

; qhasm:   m2 = 0
; asm 1: li >m2=int32#8,0
; asm 2: li >m2=r10,0
li r10,0

; qhasm:   lbelow9 = l - 9
; asm 1: addi >lbelow9=int32#9,<l=int32#5,-9
; asm 2: addi >lbelow9=r11,<l=r7,-9
addi r11,r7,-9

; qhasm:   m3 = 0
; asm 1: li >m3=int32#10,0
; asm 2: li >m3=r12,0
li r12,0

; qhasm:   lbelow10 = l - 10
; asm 1: addi >lbelow10=int32#12,<l=int32#5,-10
; asm 2: addi >lbelow10=r14,<l=r7,-10
addi r14,r7,-10

; qhasm:   lbelow11 = l - 11
; asm 1: addi >lbelow11=int32#13,<l=int32#5,-11
; asm 2: addi >lbelow11=r15,<l=r7,-11
addi r15,r7,-11

; qhasm:   (int32) lbelow9 >>= 31
; asm 1: srawi >lbelow9=int32#9,<lbelow9=int32#9,31
; asm 2: srawi >lbelow9=r11,<lbelow9=r11,31
srawi r11,r11,31

; qhasm:   lbelow12 = l - 12
; asm 1: addi >lbelow12=int32#14,<l=int32#5,-12
; asm 2: addi >lbelow12=r16,<l=r7,-12
addi r16,r7,-12

; qhasm:   (int32) lbelow10 >>= 31
; asm 1: srawi >lbelow10=int32#12,<lbelow10=int32#12,31
; asm 2: srawi >lbelow10=r14,<lbelow10=r14,31
srawi r14,r14,31

; qhasm:   m += lbelow9
; asm 1: add >m=int32#4,<m=int32#4,<lbelow9=int32#9
; asm 2: add >m=r6,<m=r6,<lbelow9=r11
add r6,r6,r11

; qhasm:   m20 = *(uint8 *) (m + 8)
; asm 1: lbz >m20=int32#15,8(<m=int32#4)
; asm 2: lbz >m20=r17,8(<m=r6)
lbz r17,8(r6)

; qhasm:   (int32) lbelow11 >>= 31
; asm 1: srawi >lbelow11=int32#13,<lbelow11=int32#13,31
; asm 2: srawi >lbelow11=r15,<lbelow11=r15,31
srawi r15,r15,31

; qhasm:   m += lbelow10
; asm 1: add >m=int32#4,<m=int32#4,<lbelow10=int32#12
; asm 2: add >m=r6,<m=r6,<lbelow10=r14
add r6,r6,r14

; qhasm:   m21 = *(uint8 *) (m + 9)
; asm 1: lbz >m21=int32#16,9(<m=int32#4)
; asm 2: lbz >m21=r18,9(<m=r6)
lbz r18,9(r6)

; qhasm:   (int32) lbelow12 >>= 31
; asm 1: srawi >lbelow12=int32#14,<lbelow12=int32#14,31
; asm 2: srawi >lbelow12=r16,<lbelow12=r16,31
srawi r16,r16,31

; qhasm:   m += lbelow11
; asm 1: add >m=int32#4,<m=int32#4,<lbelow11=int32#13
; asm 2: add >m=r6,<m=r6,<lbelow11=r15
add r6,r6,r15

; qhasm:   m22 = *(uint8 *) (m + 10)
; asm 1: lbz >m22=int32#17,10(<m=int32#4)
; asm 2: lbz >m22=r19,10(<m=r6)
lbz r19,10(r6)

; qhasm:   m += lbelow12
; asm 1: add >m=int32#4,<m=int32#4,<lbelow12=int32#14
; asm 2: add >m=r6,<m=r6,<lbelow12=r16
add r6,r6,r16

; qhasm:   m23 = *(uint8 *) (m + 11)
; asm 1: lbz >m23=int32#18,11(<m=int32#4)
; asm 2: lbz >m23=r20,11(<m=r6)
lbz r20,11(r6)

; qhasm:   m20 &= ~lbelow9
; asm 1: andc >m20=int32#15,<m20=int32#15,<lbelow9=int32#9
; asm 2: andc >m20=r17,<m20=r17,<lbelow9=r11
andc r17,r17,r11

; qhasm:   lbelow8 -= lbelow9
; asm 1: subf >lbelow8=int32#11,<lbelow9=int32#9,<lbelow8=int32#11
; asm 2: subf >lbelow8=r13,<lbelow9=r11,<lbelow8=r13
subf r13,r11,r13

; qhasm:   m20 += lbelow8
; asm 1: add >m20=int32#11,<m20=int32#15,<lbelow8=int32#11
; asm 2: add >m20=r13,<m20=r17,<lbelow8=r13
add r13,r17,r13

; qhasm:   lbelow9 -= lbelow10
; asm 1: subf >lbelow9=int32#9,<lbelow10=int32#12,<lbelow9=int32#9
; asm 2: subf >lbelow9=r11,<lbelow10=r14,<lbelow9=r11
subf r11,r14,r11

; qhasm:   m21 &= ~lbelow10
; asm 1: andc >m21=int32#15,<m21=int32#16,<lbelow10=int32#12
; asm 2: andc >m21=r17,<m21=r18,<lbelow10=r14
andc r17,r18,r14

; qhasm:   m21 += lbelow9
; asm 1: add >m21=int32#9,<m21=int32#15,<lbelow9=int32#9
; asm 2: add >m21=r11,<m21=r17,<lbelow9=r11
add r11,r17,r11

; qhasm:   m21 <<= 8
; asm 1: slwi >m21=int32#9,<m21=int32#9,8
; asm 2: slwi >m21=r11,<m21=r11,8
slwi r11,r11,8

; qhasm:   m2 += m20
; asm 1: add >m2=int32#8,<m2=int32#8,<m20=int32#11
; asm 2: add >m2=r10,<m2=r10,<m20=r13
add r10,r10,r13

; qhasm:   m2 += m21
; asm 1: add >m2=int32#8,<m2=int32#8,<m21=int32#9
; asm 2: add >m2=r10,<m2=r10,<m21=r11
add r10,r10,r11

; qhasm:   m22 &= ~lbelow11
; asm 1: andc >m22=int32#9,<m22=int32#17,<lbelow11=int32#13
; asm 2: andc >m22=r11,<m22=r19,<lbelow11=r15
andc r11,r19,r15

; qhasm:   lbelow10 -= lbelow11
; asm 1: subf >lbelow10=int32#11,<lbelow11=int32#13,<lbelow10=int32#12
; asm 2: subf >lbelow10=r13,<lbelow11=r15,<lbelow10=r14
subf r13,r15,r14

; qhasm:   m23 &= ~lbelow12
; asm 1: andc >m23=int32#12,<m23=int32#18,<lbelow12=int32#14
; asm 2: andc >m23=r14,<m23=r20,<lbelow12=r16
andc r14,r20,r16

; qhasm:   m22 += lbelow10
; asm 1: add >m22=int32#9,<m22=int32#9,<lbelow10=int32#11
; asm 2: add >m22=r11,<m22=r11,<lbelow10=r13
add r11,r11,r13

; qhasm:   lbelow11 -= lbelow12
; asm 1: subf >lbelow11=int32#11,<lbelow12=int32#14,<lbelow11=int32#13
; asm 2: subf >lbelow11=r13,<lbelow12=r16,<lbelow11=r15
subf r13,r16,r15

; qhasm:   m22 <<= 16
; asm 1: slwi >m22=int32#9,<m22=int32#9,16
; asm 2: slwi >m22=r11,<m22=r11,16
slwi r11,r11,16

; qhasm:   m23 += lbelow11
; asm 1: add >m23=int32#11,<m23=int32#12,<lbelow11=int32#11
; asm 2: add >m23=r13,<m23=r14,<lbelow11=r13
add r13,r14,r13

; qhasm:   m23 <<= 24
; asm 1: slwi >m23=int32#11,<m23=int32#11,24
; asm 2: slwi >m23=r13,<m23=r13,24
slwi r13,r13,24

; qhasm:   m2 += m22
; asm 1: add >m2=int32#8,<m2=int32#8,<m22=int32#9
; asm 2: add >m2=r10,<m2=r10,<m22=r11
add r10,r10,r11

; qhasm:   lbelow13 = l - 13
; asm 1: addi >lbelow13=int32#9,<l=int32#5,-13
; asm 2: addi >lbelow13=r11,<l=r7,-13
addi r11,r7,-13

; qhasm:   (int32) lbelow13 >>= 31
; asm 1: srawi >lbelow13=int32#9,<lbelow13=int32#9,31
; asm 2: srawi >lbelow13=r11,<lbelow13=r11,31
srawi r11,r11,31

; qhasm:   lbelow14 = l - 14
; asm 1: addi >lbelow14=int32#12,<l=int32#5,-14
; asm 2: addi >lbelow14=r14,<l=r7,-14
addi r14,r7,-14

; qhasm:   (int32) lbelow14 >>= 31
; asm 1: srawi >lbelow14=int32#12,<lbelow14=int32#12,31
; asm 2: srawi >lbelow14=r14,<lbelow14=r14,31
srawi r14,r14,31

; qhasm:   m += lbelow13
; asm 1: add >m=int32#4,<m=int32#4,<lbelow13=int32#9
; asm 2: add >m=r6,<m=r6,<lbelow13=r11
add r6,r6,r11

; qhasm:   lbelow15 = l - 15
; asm 1: addi >lbelow15=int32#5,<l=int32#5,-15
; asm 2: addi >lbelow15=r7,<l=r7,-15
addi r7,r7,-15

; qhasm:   m30 = *(uint8 *) (m + 12)
; asm 1: lbz >m30=int32#13,12(<m=int32#4)
; asm 2: lbz >m30=r15,12(<m=r6)
lbz r15,12(r6)

; qhasm:   (int32) lbelow15 >>= 31
; asm 1: srawi >lbelow15=int32#5,<lbelow15=int32#5,31
; asm 2: srawi >lbelow15=r7,<lbelow15=r7,31
srawi r7,r7,31

; qhasm:   m += lbelow14
; asm 1: add >m=int32#4,<m=int32#4,<lbelow14=int32#12
; asm 2: add >m=r6,<m=r6,<lbelow14=r14
add r6,r6,r14

; qhasm:   m31 = *(uint8 *) (m + 13)
; asm 1: lbz >m31=int32#15,13(<m=int32#4)
; asm 2: lbz >m31=r17,13(<m=r6)
lbz r17,13(r6)

; qhasm:   m += lbelow15
; asm 1: add >m=int32#4,<m=int32#4,<lbelow15=int32#5
; asm 2: add >m=r6,<m=r6,<lbelow15=r7
add r6,r6,r7

; qhasm:   m2 += m23
; asm 1: add >m2=int32#8,<m2=int32#8,<m23=int32#11
; asm 2: add >m2=r10,<m2=r10,<m23=r13
add r10,r10,r13

; qhasm:   m32 = *(uint8 *) (m + 14)
; asm 1: lbz >m32=int32#4,14(<m=int32#4)
; asm 2: lbz >m32=r6,14(<m=r6)
lbz r6,14(r6)

; qhasm:   m30 &= ~lbelow13
; asm 1: andc >m30=int32#11,<m30=int32#13,<lbelow13=int32#9
; asm 2: andc >m30=r13,<m30=r15,<lbelow13=r11
andc r13,r15,r11

; qhasm:   lbelow12 -= lbelow13
; asm 1: subf >lbelow12=int32#13,<lbelow13=int32#9,<lbelow12=int32#14
; asm 2: subf >lbelow12=r15,<lbelow13=r11,<lbelow12=r16
subf r15,r11,r16

; qhasm:   m30 += lbelow12
; asm 1: add >m30=int32#11,<m30=int32#11,<lbelow12=int32#13
; asm 2: add >m30=r13,<m30=r13,<lbelow12=r15
add r13,r13,r15

; qhasm:   lbelow13 -= lbelow14
; asm 1: subf >lbelow13=int32#9,<lbelow14=int32#12,<lbelow13=int32#9
; asm 2: subf >lbelow13=r11,<lbelow14=r14,<lbelow13=r11
subf r11,r14,r11

; qhasm:   m3 += m30
; asm 1: add >m3=int32#10,<m3=int32#10,<m30=int32#11
; asm 2: add >m3=r12,<m3=r12,<m30=r13
add r12,r12,r13

; qhasm:   m31 &= ~lbelow14
; asm 1: andc >m31=int32#11,<m31=int32#15,<lbelow14=int32#12
; asm 2: andc >m31=r13,<m31=r17,<lbelow14=r14
andc r13,r17,r14

; qhasm:   m31 += lbelow13
; asm 1: add >m31=int32#9,<m31=int32#11,<lbelow13=int32#9
; asm 2: add >m31=r11,<m31=r13,<lbelow13=r11
add r11,r13,r11

; qhasm:   m32 &= ~lbelow15
; asm 1: andc >m32=int32#4,<m32=int32#4,<lbelow15=int32#5
; asm 2: andc >m32=r6,<m32=r6,<lbelow15=r7
andc r6,r6,r7

; qhasm:   m31 <<= 8
; asm 1: slwi >m31=int32#9,<m31=int32#9,8
; asm 2: slwi >m31=r11,<m31=r11,8
slwi r11,r11,8

; qhasm:   lbelow14 -= lbelow15
; asm 1: subf >lbelow14=int32#11,<lbelow15=int32#5,<lbelow14=int32#12
; asm 2: subf >lbelow14=r13,<lbelow15=r7,<lbelow14=r14
subf r13,r7,r14

; qhasm:   m3 += m31
; asm 1: add >m3=int32#9,<m3=int32#10,<m31=int32#9
; asm 2: add >m3=r11,<m3=r12,<m31=r11
add r11,r12,r11

; qhasm:   m32 += lbelow14
; asm 1: add >m32=int32#4,<m32=int32#4,<lbelow14=int32#11
; asm 2: add >m32=r6,<m32=r6,<lbelow14=r13
add r6,r6,r13

; qhasm:   m32 <<= 16
; asm 1: slwi >m32=int32#4,<m32=int32#4,16
; asm 2: slwi >m32=r6,<m32=r6,16
slwi r6,r6,16

; qhasm:   m33 = lbelow15 + 1
; asm 1: addi >m33=int32#5,<lbelow15=int32#5,1
; asm 2: addi >m33=r7,<lbelow15=r7,1
addi r7,r7,1

; qhasm:   m33 <<= 24
; asm 1: slwi >m33=int32#5,<m33=int32#5,24
; asm 2: slwi >m33=r7,<m33=r7,24
slwi r7,r7,24

; qhasm:   m3 += m32
; asm 1: add >m3=int32#4,<m3=int32#9,<m32=int32#4
; asm 2: add >m3=r6,<m3=r11,<m32=r6
add r6,r11,r6

; qhasm:   m3 += m33
; asm 1: add >m3=int32#4,<m3=int32#4,<m33=int32#5
; asm 2: add >m3=r6,<m3=r6,<m33=r7
add r6,r6,r7

; qhasm:   d0 bottom = m0
; asm 1: stw <m0=int32#2,>d0=stack64#25
; asm 2: stw <m0=r4,>d0=276(r1)
stw r4,276(r1)

; qhasm:   d1 bottom = m1
; asm 1: stw <m1=int32#7,>d1=stack64#26
; asm 2: stw <m1=r9,>d1=284(r1)
stw r9,284(r1)

; qhasm:   d2 bottom = m2
; asm 1: stw <m2=int32#8,>d2=stack64#27
; asm 2: stw <m2=r10,>d2=292(r1)
stw r10,292(r1)

; qhasm:   d3 bottom = m3
; asm 1: stw <m3=int32#4,>d3=stack64#28
; asm 2: stw <m3=r6,>d3=300(r1)
stw r6,300(r1)

; qhasm:   m0 = 65536 * 0x4338
; asm 1: lis >m0=int32#2,0x4338
; asm 2: lis >m0=r4,0x4338
lis r4,0x4338

; qhasm:   m1 = 65536 * 0x4538
; asm 1: lis >m1=int32#4,0x4538
; asm 2: lis >m1=r6,0x4538
lis r6,0x4538

; qhasm:   m2 = 65536 * 0x4738
; asm 1: lis >m2=int32#5,0x4738
; asm 2: lis >m2=r7,0x4738
lis r7,0x4738

; qhasm:   m3 = 65536 * 0x4938
; asm 1: lis >m3=int32#7,0x4938
; asm 2: lis >m3=r9,0x4938
lis r9,0x4938

; qhasm:   inplace d0 top = m0
; asm 1: stw <m0=int32#2,<d0=stack64#25
; asm 2: stw <m0=r4,<d0=272(r1)
stw r4,272(r1)

; qhasm:   inplace d1 top = m1
; asm 1: stw <m1=int32#4,<d1=stack64#26
; asm 2: stw <m1=r6,<d1=280(r1)
stw r6,280(r1)

; qhasm:   inplace d2 top = m2
; asm 1: stw <m2=int32#5,<d2=stack64#27
; asm 2: stw <m2=r7,<d2=288(r1)
stw r7,288(r1)

; qhasm:   inplace d3 top = m3
; asm 1: stw <m3=int32#7,<d3=stack64#28
; asm 2: stw <m3=r9,<d3=296(r1)
stw r9,296(r1)

; qhasm:   alpha0 = *(float64 *) (constants + 24)
; asm 1: lfd >alpha0=float64#4,24(<constants=int32#6)
; asm 2: lfd >alpha0=f3,24(<constants=r8)
lfd f3,24(r8)

; qhasm:   z3 = d3
; asm 1: lfd >z3=float64#21,<d3=stack64#28
; asm 2: lfd >z3=f20,<d3=296(r1)
lfd f20,296(r1)

; qhasm:   z2 = d2
; asm 1: lfd >z2=float64#23,<d2=stack64#27
; asm 2: lfd >z2=f22,<d2=288(r1)
lfd f22,288(r1)

; qhasm:   z1 = d1
; asm 1: lfd >z1=float64#24,<d1=stack64#26
; asm 2: lfd >z1=f23,<d1=280(r1)
lfd f23,280(r1)

; qhasm:   z0 = d0
; asm 1: lfd >z0=float64#25,<d0=stack64#25
; asm 2: lfd >z0=f24,<d0=272(r1)
lfd f24,272(r1)

; qhasm:   z3 -= alpha96
; asm 1: fsub >z3=float64#21,<z3=float64#21,<alpha96=float64#19
; asm 2: fsub >z3=f20,<z3=f20,<alpha96=f18
fsub f20,f20,f18

; qhasm:   z2 -= alpha64
; asm 1: fsub >z2=float64#23,<z2=float64#23,<alpha64=float64#6
; asm 2: fsub >z2=f22,<z2=f22,<alpha64=f5
fsub f22,f22,f5

; qhasm:   z1 -= alpha32
; asm 1: fsub >z1=float64#24,<z1=float64#24,<alpha32=float64#1
; asm 2: fsub >z1=f23,<z1=f23,<alpha32=f0
fsub f23,f23,f0

; qhasm:   z0 -= alpha0
; asm 1: fsub >z0=float64#4,<z0=float64#25,<alpha0=float64#4
; asm 2: fsub >z0=f3,<z0=f24,<alpha0=f3
fsub f3,f24,f3

; qhasm:   h5 += z3
; asm 1: fadd >h5=float64#11,<h5=float64#11,<z3=float64#21
; asm 2: fadd >h5=f10,<h5=f10,<z3=f20
fadd f10,f10,f20

; qhasm:   h3 += z2
; asm 1: fadd >h3=float64#7,<h3=float64#7,<z2=float64#23
; asm 2: fadd >h3=f6,<h3=f6,<z2=f22
fadd f6,f6,f22

; qhasm:   h1 += z1
; asm 1: fadd >h1=float64#3,<h1=float64#3,<z1=float64#24
; asm 2: fadd >h1=f2,<h1=f2,<z1=f23
fadd f2,f2,f23

; qhasm:   h0 += z0
; asm 1: fadd >h0=float64#2,<h0=float64#2,<z0=float64#4
; asm 2: fadd >h0=f1,<h0=f1,<z0=f3
fadd f1,f1,f3

; qhasm:   y1 = h1 + alpha32
; asm 1: fadd >y1=float64#4,<h1=float64#3,<alpha32=float64#1
; asm 2: fadd >y1=f3,<h1=f2,<alpha32=f0
fadd f3,f2,f0

; qhasm:   y0 = h0 + alpha32
; asm 1: fadd >y0=float64#21,<h0=float64#2,<alpha32=float64#1
; asm 2: fadd >y0=f20,<h0=f1,<alpha32=f0
fadd f20,f1,f0

; qhasm:   y7 = h7 + alpha130
; asm 1: fadd >y7=float64#23,<h7=float64#15,<alpha130=float64#29
; asm 2: fadd >y7=f22,<h7=f14,<alpha130=f28
fadd f22,f14,f28

; qhasm:   y6 = h6 + alpha130
; asm 1: fadd >y6=float64#24,<h6=float64#13,<alpha130=float64#29
; asm 2: fadd >y6=f23,<h6=f12,<alpha130=f28
fadd f23,f12,f28

; qhasm:   y5 = h5 + alpha96
; asm 1: fadd >y5=float64#25,<h5=float64#11,<alpha96=float64#19
; asm 2: fadd >y5=f24,<h5=f10,<alpha96=f18
fadd f24,f10,f18

; qhasm:   y4 = h4 + alpha96
; asm 1: fadd >y4=float64#26,<h4=float64#9,<alpha96=float64#19
; asm 2: fadd >y4=f25,<h4=f8,<alpha96=f18
fadd f25,f8,f18

; qhasm:   y3 = h3 + alpha64
; asm 1: fadd >y3=float64#27,<h3=float64#7,<alpha64=float64#6
; asm 2: fadd >y3=f26,<h3=f6,<alpha64=f5
fadd f26,f6,f5

; qhasm:   y2 = h2 + alpha64
; asm 1: fadd >y2=float64#28,<h2=float64#5,<alpha64=float64#6
; asm 2: fadd >y2=f27,<h2=f4,<alpha64=f5
fadd f27,f4,f5

; qhasm:   y1 -= alpha32
; asm 1: fsub >y1=float64#4,<y1=float64#4,<alpha32=float64#1
; asm 2: fsub >y1=f3,<y1=f3,<alpha32=f0
fsub f3,f3,f0

; qhasm:   y0 -= alpha32
; asm 1: fsub >y0=float64#21,<y0=float64#21,<alpha32=float64#1
; asm 2: fsub >y0=f20,<y0=f20,<alpha32=f0
fsub f20,f20,f0

; qhasm:   y7 -= alpha130
; asm 1: fsub >y7=float64#23,<y7=float64#23,<alpha130=float64#29
; asm 2: fsub >y7=f22,<y7=f22,<alpha130=f28
fsub f22,f22,f28

; qhasm:   y6 -= alpha130
; asm 1: fsub >y6=float64#24,<y6=float64#24,<alpha130=float64#29
; asm 2: fsub >y6=f23,<y6=f23,<alpha130=f28
fsub f23,f23,f28

; qhasm:   y5 -= alpha96
; asm 1: fsub >y5=float64#25,<y5=float64#25,<alpha96=float64#19
; asm 2: fsub >y5=f24,<y5=f24,<alpha96=f18
fsub f24,f24,f18

; qhasm:   y4 -= alpha96
; asm 1: fsub >y4=float64#26,<y4=float64#26,<alpha96=float64#19
; asm 2: fsub >y4=f25,<y4=f25,<alpha96=f18
fsub f25,f25,f18

; qhasm:   y3 -= alpha64
; asm 1: fsub >y3=float64#27,<y3=float64#27,<alpha64=float64#6
; asm 2: fsub >y3=f26,<y3=f26,<alpha64=f5
fsub f26,f26,f5

; qhasm:   y2 -= alpha64
; asm 1: fsub >y2=float64#28,<y2=float64#28,<alpha64=float64#6
; asm 2: fsub >y2=f27,<y2=f27,<alpha64=f5
fsub f27,f27,f5

; qhasm:   x1 = h1 - y1
; asm 1: fsub >x1=float64#3,<h1=float64#3,<y1=float64#4
; asm 2: fsub >x1=f2,<h1=f2,<y1=f3
fsub f2,f2,f3

; qhasm:   x0 = h0 - y0
; asm 1: fsub >x0=float64#2,<h0=float64#2,<y0=float64#21
; asm 2: fsub >x0=f1,<h0=f1,<y0=f20
fsub f1,f1,f20

; qhasm:   x7 = h7 - y7
; asm 1: fsub >x7=float64#15,<h7=float64#15,<y7=float64#23
; asm 2: fsub >x7=f14,<h7=f14,<y7=f22
fsub f14,f14,f22

; qhasm:   x6 = h6 - y6
; asm 1: fsub >x6=float64#13,<h6=float64#13,<y6=float64#24
; asm 2: fsub >x6=f12,<h6=f12,<y6=f23
fsub f12,f12,f23

; qhasm:   x5 = h5 - y5
; asm 1: fsub >x5=float64#11,<h5=float64#11,<y5=float64#25
; asm 2: fsub >x5=f10,<h5=f10,<y5=f24
fsub f10,f10,f24

; qhasm:   x4 = h4 - y4
; asm 1: fsub >x4=float64#9,<h4=float64#9,<y4=float64#26
; asm 2: fsub >x4=f8,<h4=f8,<y4=f25
fsub f8,f8,f25

; qhasm:   x3 = h3 - y3
; asm 1: fsub >x3=float64#7,<h3=float64#7,<y3=float64#27
; asm 2: fsub >x3=f6,<h3=f6,<y3=f26
fsub f6,f6,f26

; qhasm:   x2 = h2 - y2
; asm 1: fsub >x2=float64#5,<h2=float64#5,<y2=float64#28
; asm 2: fsub >x2=f4,<h2=f4,<y2=f27
fsub f4,f4,f27

; qhasm:   x1 += y7 * scale
; asm 1: fmadd >x1=float64#3,<y7=float64#23,<scale=float64#18,<x1=float64#3
; asm 2: fmadd >x1=f2,<y7=f22,<scale=f17,<x1=f2
fmadd f2,f22,f17,f2

; qhasm:   x0 += y6 * scale
; asm 1: fmadd >x0=float64#2,<y6=float64#24,<scale=float64#18,<x0=float64#2
; asm 2: fmadd >x0=f1,<y6=f23,<scale=f17,<x0=f1
fmadd f1,f23,f17,f1

; qhasm:   x7 += y5
; asm 1: fadd >x7=float64#15,<x7=float64#15,<y5=float64#25
; asm 2: fadd >x7=f14,<x7=f14,<y5=f24
fadd f14,f14,f24

; qhasm:   x6 += y4
; asm 1: fadd >x6=float64#13,<x6=float64#13,<y4=float64#26
; asm 2: fadd >x6=f12,<x6=f12,<y4=f25
fadd f12,f12,f25

; qhasm:   x5 += y3
; asm 1: fadd >x5=float64#11,<x5=float64#11,<y3=float64#27
; asm 2: fadd >x5=f10,<x5=f10,<y3=f26
fadd f10,f10,f26

; qhasm:   x4 += y2
; asm 1: fadd >x4=float64#9,<x4=float64#9,<y2=float64#28
; asm 2: fadd >x4=f8,<x4=f8,<y2=f27
fadd f8,f8,f27

; qhasm:   x3 += y1
; asm 1: fadd >x3=float64#4,<x3=float64#7,<y1=float64#4
; asm 2: fadd >x3=f3,<x3=f6,<y1=f3
fadd f3,f6,f3

; qhasm:   x2 += y0
; asm 1: fadd >x2=float64#5,<x2=float64#5,<y0=float64#21
; asm 2: fadd >x2=f4,<x2=f4,<y0=f20
fadd f4,f4,f20

; qhasm:   x0 += x1
; asm 1: fadd >x0=float64#2,<x0=float64#2,<x1=float64#3
; asm 2: fadd >x0=f1,<x0=f1,<x1=f2
fadd f1,f1,f2

; qhasm:   x6 += x7
; asm 1: fadd >x6=float64#21,<x6=float64#13,<x7=float64#15
; asm 2: fadd >x6=f20,<x6=f12,<x7=f14
fadd f20,f12,f14

; qhasm:   x4 += x5
; asm 1: fadd >x4=float64#3,<x4=float64#9,<x5=float64#11
; asm 2: fadd >x4=f2,<x4=f8,<x5=f10
fadd f2,f8,f10

; qhasm:   x2 += x3
; asm 1: fadd >x2=float64#4,<x2=float64#5,<x3=float64#4
; asm 2: fadd >x2=f3,<x2=f4,<x3=f3
fadd f3,f4,f3

; qhasm:   h7 = r3high * x0
; asm 1: fmul >h7=float64#5,<r3high=float64#22,<x0=float64#2
; asm 2: fmul >h7=f4,<r3high=f21,<x0=f1
fmul f4,f21,f1

; qhasm:   h6 = r3low * x0
; asm 1: fmul >h6=float64#7,<r3low=float64#20,<x0=float64#2
; asm 2: fmul >h6=f6,<r3low=f19,<x0=f1
fmul f6,f19,f1

; qhasm:   h5 = r2high * x0
; asm 1: fmul >h5=float64#9,<r2high=float64#17,<x0=float64#2
; asm 2: fmul >h5=f8,<r2high=f16,<x0=f1
fmul f8,f16,f1

; qhasm:   h4 = r2low * x0
; asm 1: fmul >h4=float64#11,<r2low=float64#14,<x0=float64#2
; asm 2: fmul >h4=f10,<r2low=f13,<x0=f1
fmul f10,f13,f1

; qhasm:   h3 = r1high * x0
; asm 1: fmul >h3=float64#13,<r1high=float64#16,<x0=float64#2
; asm 2: fmul >h3=f12,<r1high=f15,<x0=f1
fmul f12,f15,f1

; qhasm:   h2 = r1low * x0
; asm 1: fmul >h2=float64#15,<r1low=float64#12,<x0=float64#2
; asm 2: fmul >h2=f14,<r1low=f11,<x0=f1
fmul f14,f11,f1

; qhasm:   h1 = r0high * x0
; asm 1: fmul >h1=float64#20,<r0high=float64#8,<x0=float64#2
; asm 2: fmul >h1=f19,<r0high=f7,<x0=f1
fmul f19,f7,f1

; qhasm:   h0 = r0low * x0
; asm 1: fmul >h0=float64#2,<r0low=float64#10,<x0=float64#2
; asm 2: fmul >h0=f1,<r0low=f9,<x0=f1
fmul f1,f9,f1

; qhasm:   h7 += r2high * x2
; asm 1: fmadd >h7=float64#5,<r2high=float64#17,<x2=float64#4,<h7=float64#5
; asm 2: fmadd >h7=f4,<r2high=f16,<x2=f3,<h7=f4
fmadd f4,f16,f3,f4

; qhasm:   h6 += r2low * x2
; asm 1: fmadd >h6=float64#7,<r2low=float64#14,<x2=float64#4,<h6=float64#7
; asm 2: fmadd >h6=f6,<r2low=f13,<x2=f3,<h6=f6
fmadd f6,f13,f3,f6

; qhasm:   h5 += r1high * x2
; asm 1: fmadd >h5=float64#9,<r1high=float64#16,<x2=float64#4,<h5=float64#9
; asm 2: fmadd >h5=f8,<r1high=f15,<x2=f3,<h5=f8
fmadd f8,f15,f3,f8

; qhasm:   h4 += r1low * x2
; asm 1: fmadd >h4=float64#11,<r1low=float64#12,<x2=float64#4,<h4=float64#11
; asm 2: fmadd >h4=f10,<r1low=f11,<x2=f3,<h4=f10
fmadd f10,f11,f3,f10

; qhasm:   h3 += r0high * x2
; asm 1: fmadd >h3=float64#14,<r0high=float64#8,<x2=float64#4,<h3=float64#13
; asm 2: fmadd >h3=f13,<r0high=f7,<x2=f3,<h3=f12
fmadd f13,f7,f3,f12

; qhasm:   h2 += r0low * x2
; asm 1: fmadd >h2=float64#17,<r0low=float64#10,<x2=float64#4,<h2=float64#15
; asm 2: fmadd >h2=f16,<r0low=f9,<x2=f3,<h2=f14
fmadd f16,f9,f3,f14

; qhasm:   h7 += r1high * x4
; asm 1: fmadd >h7=float64#5,<r1high=float64#16,<x4=float64#3,<h7=float64#5
; asm 2: fmadd >h7=f4,<r1high=f15,<x4=f2,<h7=f4
fmadd f4,f15,f2,f4

; qhasm:   h6 += r1low * x4
; asm 1: fmadd >h6=float64#7,<r1low=float64#12,<x4=float64#3,<h6=float64#7
; asm 2: fmadd >h6=f6,<r1low=f11,<x4=f2,<h6=f6
fmadd f6,f11,f2,f6

; qhasm:   sr3high = sr3high_stack
; asm 1: lfd >sr3high=float64#12,<sr3high_stack=stack64#23
; asm 2: lfd >sr3high=f11,<sr3high_stack=256(r1)
lfd f11,256(r1)

; qhasm:   h5 += r0high * x4
; asm 1: fmadd >h5=float64#9,<r0high=float64#8,<x4=float64#3,<h5=float64#9
; asm 2: fmadd >h5=f8,<r0high=f7,<x4=f2,<h5=f8
fmadd f8,f7,f2,f8

; qhasm:   sr3low = sr3low_stack
; asm 1: lfd >sr3low=float64#16,<sr3low_stack=stack64#24
; asm 2: lfd >sr3low=f15,<sr3low_stack=264(r1)
lfd f15,264(r1)

; qhasm:   h4 += r0low * x4
; asm 1: fmadd >h4=float64#22,<r0low=float64#10,<x4=float64#3,<h4=float64#11
; asm 2: fmadd >h4=f21,<r0low=f9,<x4=f2,<h4=f10
fmadd f21,f9,f2,f10

; qhasm:   h7 += r0high * x6
; asm 1: fmadd >h7=float64#15,<r0high=float64#8,<x6=float64#21,<h7=float64#5
; asm 2: fmadd >h7=f14,<r0high=f7,<x6=f20,<h7=f4
fmadd f14,f7,f20,f4

; qhasm:   h6 += r0low * x6
; asm 1: fmadd >h6=float64#13,<r0low=float64#10,<x6=float64#21,<h6=float64#7
; asm 2: fmadd >h6=f12,<r0low=f9,<x6=f20,<h6=f6
fmadd f12,f9,f20,f6

; qhasm:   h1 += sr3high * x2
; asm 1: fmadd >h1=float64#5,<sr3high=float64#12,<x2=float64#4,<h1=float64#20
; asm 2: fmadd >h1=f4,<sr3high=f11,<x2=f3,<h1=f19
fmadd f4,f11,f3,f19

; qhasm:   h0 += sr3low * x2
; asm 1: fmadd >h0=float64#2,<sr3low=float64#16,<x2=float64#4,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr3low=f15,<x2=f3,<h0=f1
fmadd f1,f15,f3,f1

; qhasm:   sr2high = sr2high_stack
; asm 1: lfd >sr2high=float64#4,<sr2high_stack=stack64#20
; asm 2: lfd >sr2high=f3,<sr2high_stack=232(r1)
lfd f3,232(r1)

; qhasm:   h3 += sr3high * x4
; asm 1: fmadd >h3=float64#7,<sr3high=float64#12,<x4=float64#3,<h3=float64#14
; asm 2: fmadd >h3=f6,<sr3high=f11,<x4=f2,<h3=f13
fmadd f6,f11,f2,f13

; qhasm:   sr2low = sr2low_stack
; asm 1: lfd >sr2low=float64#8,<sr2low_stack=stack64#22
; asm 2: lfd >sr2low=f7,<sr2low_stack=248(r1)
lfd f7,248(r1)

; qhasm:   h2 += sr3low * x4
; asm 1: fmadd >h2=float64#10,<sr3low=float64#16,<x4=float64#3,<h2=float64#17
; asm 2: fmadd >h2=f9,<sr3low=f15,<x4=f2,<h2=f16
fmadd f9,f15,f2,f16

; qhasm:   h5 += sr3high * x6
; asm 1: fmadd >h5=float64#11,<sr3high=float64#12,<x6=float64#21,<h5=float64#9
; asm 2: fmadd >h5=f10,<sr3high=f11,<x6=f20,<h5=f8
fmadd f10,f11,f20,f8

; qhasm:   sr1high = sr1high_stack
; asm 1: lfd >sr1high=float64#12,<sr1high_stack=stack64#19
; asm 2: lfd >sr1high=f11,<sr1high_stack=224(r1)
lfd f11,224(r1)

; qhasm:   h4 += sr3low * x6
; asm 1: fmadd >h4=float64#9,<sr3low=float64#16,<x6=float64#21,<h4=float64#22
; asm 2: fmadd >h4=f8,<sr3low=f15,<x6=f20,<h4=f21
fmadd f8,f15,f20,f21

; qhasm:   sr1low = sr1low_stack
; asm 1: lfd >sr1low=float64#14,<sr1low_stack=stack64#21
; asm 2: lfd >sr1low=f13,<sr1low_stack=240(r1)
lfd f13,240(r1)

; qhasm:   h1 += sr2high * x4
; asm 1: fmadd >h1=float64#16,<sr2high=float64#4,<x4=float64#3,<h1=float64#5
; asm 2: fmadd >h1=f15,<sr2high=f3,<x4=f2,<h1=f4
fmadd f15,f3,f2,f4

; qhasm:   h0 += sr2low * x4
; asm 1: fmadd >h0=float64#2,<sr2low=float64#8,<x4=float64#3,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr2low=f7,<x4=f2,<h0=f1
fmadd f1,f7,f2,f1

; qhasm:   h3 += sr2high * x6
; asm 1: fmadd >h3=float64#7,<sr2high=float64#4,<x6=float64#21,<h3=float64#7
; asm 2: fmadd >h3=f6,<sr2high=f3,<x6=f20,<h3=f6
fmadd f6,f3,f20,f6

; qhasm:   h2 += sr2low * x6
; asm 1: fmadd >h2=float64#5,<sr2low=float64#8,<x6=float64#21,<h2=float64#10
; asm 2: fmadd >h2=f4,<sr2low=f7,<x6=f20,<h2=f9
fmadd f4,f7,f20,f9

; qhasm:   h1 += sr1high * x6
; asm 1: fmadd >h1=float64#3,<sr1high=float64#12,<x6=float64#21,<h1=float64#16
; asm 2: fmadd >h1=f2,<sr1high=f11,<x6=f20,<h1=f15
fmadd f2,f11,f20,f15

; qhasm:   h0 += sr1low * x6
; asm 1: fmadd >h0=float64#2,<sr1low=float64#14,<x6=float64#21,<h0=float64#2
; asm 2: fmadd >h0=f1,<sr1low=f13,<x6=f20,<h0=f1
fmadd f1,f13,f20,f1

; qhasm: nomorebytes:
.label.nomorebytes:

; qhasm:   offset0 = *(float64 *) (constants + 104)
; asm 1: lfd >offset0=float64#4,104(<constants=int32#6)
; asm 2: lfd >offset0=f3,104(<constants=r8)
lfd f3,104(r8)

; qhasm:   y7 = h7 + alpha130
; asm 1: fadd >y7=float64#8,<h7=float64#15,<alpha130=float64#29
; asm 2: fadd >y7=f7,<h7=f14,<alpha130=f28
fadd f7,f14,f28

; qhasm:   offset1 = *(float64 *) (constants + 112)
; asm 1: lfd >offset1=float64#10,112(<constants=int32#6)
; asm 2: lfd >offset1=f9,112(<constants=r8)
lfd f9,112(r8)

; qhasm:   y0 = h0 + alpha32
; asm 1: fadd >y0=float64#12,<h0=float64#2,<alpha32=float64#1
; asm 2: fadd >y0=f11,<h0=f1,<alpha32=f0
fadd f11,f1,f0

; qhasm:   offset2 = *(float64 *) (constants + 120)
; asm 1: lfd >offset2=float64#14,120(<constants=int32#6)
; asm 2: lfd >offset2=f13,120(<constants=r8)
lfd f13,120(r8)

; qhasm:   y1 = h1 + alpha32
; asm 1: fadd >y1=float64#16,<h1=float64#3,<alpha32=float64#1
; asm 2: fadd >y1=f15,<h1=f2,<alpha32=f0
fadd f15,f2,f0

; qhasm:   offset3 = *(float64 *) (constants + 128)
; asm 1: lfd >offset3=float64#17,128(<constants=int32#6)
; asm 2: lfd >offset3=f16,128(<constants=r8)
lfd f16,128(r8)

; qhasm:   y2 = h2 + alpha64
; asm 1: fadd >y2=float64#20,<h2=float64#5,<alpha64=float64#6
; asm 2: fadd >y2=f19,<h2=f4,<alpha64=f5
fadd f19,f4,f5

; qhasm:   y7 -= alpha130
; asm 1: fsub >y7=float64#8,<y7=float64#8,<alpha130=float64#29
; asm 2: fsub >y7=f7,<y7=f7,<alpha130=f28
fsub f7,f7,f28

; qhasm:   y3 = h3 + alpha64
; asm 1: fadd >y3=float64#21,<h3=float64#7,<alpha64=float64#6
; asm 2: fadd >y3=f20,<h3=f6,<alpha64=f5
fadd f20,f6,f5

; qhasm:   y4 = h4 + alpha96
; asm 1: fadd >y4=float64#22,<h4=float64#9,<alpha96=float64#19
; asm 2: fadd >y4=f21,<h4=f8,<alpha96=f18
fadd f21,f8,f18

; qhasm:   y5 = h5 + alpha96
; asm 1: fadd >y5=float64#23,<h5=float64#11,<alpha96=float64#19
; asm 2: fadd >y5=f22,<h5=f10,<alpha96=f18
fadd f22,f10,f18

; qhasm:   x7 = h7 - y7
; asm 1: fsub >x7=float64#15,<h7=float64#15,<y7=float64#8
; asm 2: fsub >x7=f14,<h7=f14,<y7=f7
fsub f14,f14,f7

; qhasm:   y0 -= alpha32
; asm 1: fsub >y0=float64#12,<y0=float64#12,<alpha32=float64#1
; asm 2: fsub >y0=f11,<y0=f11,<alpha32=f0
fsub f11,f11,f0

; qhasm:   y1 -= alpha32
; asm 1: fsub >y1=float64#1,<y1=float64#16,<alpha32=float64#1
; asm 2: fsub >y1=f0,<y1=f15,<alpha32=f0
fsub f0,f15,f0

; qhasm:   y2 -= alpha64
; asm 1: fsub >y2=float64#16,<y2=float64#20,<alpha64=float64#6
; asm 2: fsub >y2=f15,<y2=f19,<alpha64=f5
fsub f15,f19,f5

; qhasm:   h6 += x7
; asm 1: fadd >h6=float64#13,<h6=float64#13,<x7=float64#15
; asm 2: fadd >h6=f12,<h6=f12,<x7=f14
fadd f12,f12,f14

; qhasm:   y3 -= alpha64
; asm 1: fsub >y3=float64#6,<y3=float64#21,<alpha64=float64#6
; asm 2: fsub >y3=f5,<y3=f20,<alpha64=f5
fsub f5,f20,f5

; qhasm:   y4 -= alpha96
; asm 1: fsub >y4=float64#15,<y4=float64#22,<alpha96=float64#19
; asm 2: fsub >y4=f14,<y4=f21,<alpha96=f18
fsub f14,f21,f18

; qhasm:   y5 -= alpha96
; asm 1: fsub >y5=float64#19,<y5=float64#23,<alpha96=float64#19
; asm 2: fsub >y5=f18,<y5=f22,<alpha96=f18
fsub f18,f22,f18

; qhasm:   y6 = h6 + alpha130
; asm 1: fadd >y6=float64#20,<h6=float64#13,<alpha130=float64#29
; asm 2: fadd >y6=f19,<h6=f12,<alpha130=f28
fadd f19,f12,f28

; qhasm:   x0 = h0 - y0
; asm 1: fsub >x0=float64#2,<h0=float64#2,<y0=float64#12
; asm 2: fsub >x0=f1,<h0=f1,<y0=f11
fsub f1,f1,f11

; qhasm:   x1 = h1 - y1
; asm 1: fsub >x1=float64#3,<h1=float64#3,<y1=float64#1
; asm 2: fsub >x1=f2,<h1=f2,<y1=f0
fsub f2,f2,f0

; qhasm:   x2 = h2 - y2
; asm 1: fsub >x2=float64#5,<h2=float64#5,<y2=float64#16
; asm 2: fsub >x2=f4,<h2=f4,<y2=f15
fsub f4,f4,f15

; qhasm:   y6 -= alpha130
; asm 1: fsub >y6=float64#20,<y6=float64#20,<alpha130=float64#29
; asm 2: fsub >y6=f19,<y6=f19,<alpha130=f28
fsub f19,f19,f28

; qhasm:   x0 += y7 * scale
; asm 1: fmadd >x0=float64#2,<y7=float64#8,<scale=float64#18,<x0=float64#2
; asm 2: fmadd >x0=f1,<y7=f7,<scale=f17,<x0=f1
fmadd f1,f7,f17,f1

; qhasm:   x3 = h3 - y3
; asm 1: fsub >x3=float64#7,<h3=float64#7,<y3=float64#6
; asm 2: fsub >x3=f6,<h3=f6,<y3=f5
fsub f6,f6,f5

; qhasm:   x4 = h4 - y4
; asm 1: fsub >x4=float64#8,<h4=float64#9,<y4=float64#15
; asm 2: fsub >x4=f7,<h4=f8,<y4=f14
fsub f7,f8,f14

; qhasm:   x5 = h5 - y5
; asm 1: fsub >x5=float64#9,<h5=float64#11,<y5=float64#19
; asm 2: fsub >x5=f8,<h5=f10,<y5=f18
fsub f8,f10,f18

; qhasm:   x6 = h6 - y6
; asm 1: fsub >x6=float64#11,<h6=float64#13,<y6=float64#20
; asm 2: fsub >x6=f10,<h6=f12,<y6=f19
fsub f10,f12,f19

; qhasm:   x2 += y0
; asm 1: fadd >x2=float64#5,<x2=float64#5,<y0=float64#12
; asm 2: fadd >x2=f4,<x2=f4,<y0=f11
fadd f4,f4,f11

; qhasm:   x3 += y1
; asm 1: fadd >x3=float64#1,<x3=float64#7,<y1=float64#1
; asm 2: fadd >x3=f0,<x3=f6,<y1=f0
fadd f0,f6,f0

; qhasm:   x4 += y2
; asm 1: fadd >x4=float64#7,<x4=float64#8,<y2=float64#16
; asm 2: fadd >x4=f6,<x4=f7,<y2=f15
fadd f6,f7,f15

; qhasm:   x0 += y6 * scale
; asm 1: fmadd >x0=float64#2,<y6=float64#20,<scale=float64#18,<x0=float64#2
; asm 2: fmadd >x0=f1,<y6=f19,<scale=f17,<x0=f1
fmadd f1,f19,f17,f1

; qhasm:   x5 += y3
; asm 1: fadd >x5=float64#6,<x5=float64#9,<y3=float64#6
; asm 2: fadd >x5=f5,<x5=f8,<y3=f5
fadd f5,f8,f5

; qhasm:   x6 += y4
; asm 1: fadd >x6=float64#8,<x6=float64#11,<y4=float64#15
; asm 2: fadd >x6=f7,<x6=f10,<y4=f14
fadd f7,f10,f14

; qhasm:   x2 += x3
; asm 1: fadd >x2=float64#1,<x2=float64#5,<x3=float64#1
; asm 2: fadd >x2=f0,<x2=f4,<x3=f0
fadd f0,f4,f0

; qhasm:   x0 += x1
; asm 1: fadd >x0=float64#2,<x0=float64#2,<x1=float64#3
; asm 2: fadd >x0=f1,<x0=f1,<x1=f2
fadd f1,f1,f2

; qhasm:   x4 += x5
; asm 1: fadd >x4=float64#3,<x4=float64#7,<x5=float64#6
; asm 2: fadd >x4=f2,<x4=f6,<x5=f5
fadd f2,f6,f5

; qhasm:   x6 += y5
; asm 1: fadd >x6=float64#5,<x6=float64#8,<y5=float64#19
; asm 2: fadd >x6=f4,<x6=f7,<y5=f18
fadd f4,f7,f18

; qhasm:   x2 += offset1
; asm 1: fadd >x2=float64#1,<x2=float64#1,<offset1=float64#10
; asm 2: fadd >x2=f0,<x2=f0,<offset1=f9
fadd f0,f0,f9

; qhasm:   d1 = x2
; asm 1: stfd <x2=float64#1,>d1=stack64#19
; asm 2: stfd <x2=f0,>d1=224(r1)
stfd f0,224(r1)

; qhasm:   x0 += offset0
; asm 1: fadd >x0=float64#1,<x0=float64#2,<offset0=float64#4
; asm 2: fadd >x0=f0,<x0=f1,<offset0=f3
fadd f0,f1,f3

; qhasm:   d0 = x0
; asm 1: stfd <x0=float64#1,>d0=stack64#20
; asm 2: stfd <x0=f0,>d0=232(r1)
stfd f0,232(r1)

; qhasm:   x4 += offset2
; asm 1: fadd >x4=float64#1,<x4=float64#3,<offset2=float64#14
; asm 2: fadd >x4=f0,<x4=f2,<offset2=f13
fadd f0,f2,f13

; qhasm:   d2 = x4
; asm 1: stfd <x4=float64#1,>d2=stack64#21
; asm 2: stfd <x4=f0,>d2=240(r1)
stfd f0,240(r1)

; qhasm:   x6 += offset3
; asm 1: fadd >x6=float64#1,<x6=float64#5,<offset3=float64#17
; asm 2: fadd >x6=f0,<x6=f4,<offset3=f16
fadd f0,f4,f16

; qhasm:   d3 = x6
; asm 1: stfd <x6=float64#1,>d3=stack64#22
; asm 2: stfd <x6=f0,>d3=248(r1)
stfd f0,248(r1)

; qhasm:   f0 = bottom d0
; asm 1: lwz >f0=int32#2,<d0=stack64#20
; asm 2: lwz >f0=r4,<d0=236(r1)
lwz r4,236(r1)

; qhasm:   g0 = top d0
; asm 1: lwz >g0=int32#4,<d0=stack64#20
; asm 2: lwz >g0=r6,<d0=232(r1)
lwz r6,232(r1)

; qhasm:   g0 &= 255
; asm 1: andi. >g0=int32#4,<g0=int32#4,255
; asm 2: andi. >g0=r6,<g0=r6,255
andi. r6,r6,255

; qhasm:   f1 = bottom d1
; asm 1: lwz >f1=int32#5,<d1=stack64#19
; asm 2: lwz >f1=r7,<d1=228(r1)
lwz r7,228(r1)

; qhasm:   g1 = top d1
; asm 1: lwz >g1=int32#6,<d1=stack64#19
; asm 2: lwz >g1=r8,<d1=224(r1)
lwz r8,224(r1)

; qhasm:   g1 &= 255
; asm 1: andi. >g1=int32#6,<g1=int32#6,255
; asm 2: andi. >g1=r8,<g1=r8,255
andi. r8,r8,255

; qhasm:   f2 = bottom d2
; asm 1: lwz >f2=int32#7,<d2=stack64#21
; asm 2: lwz >f2=r9,<d2=244(r1)
lwz r9,244(r1)

; qhasm:   g2 = top d2
; asm 1: lwz >g2=int32#8,<d2=stack64#21
; asm 2: lwz >g2=r10,<d2=240(r1)
lwz r10,240(r1)

; qhasm:   g2 &= 255
; asm 1: andi. >g2=int32#8,<g2=int32#8,255
; asm 2: andi. >g2=r10,<g2=r10,255
andi. r10,r10,255

; qhasm:   f3 = bottom d3
; asm 1: lwz >f3=int32#9,<d3=stack64#22
; asm 2: lwz >f3=r11,<d3=252(r1)
lwz r11,252(r1)

; qhasm:   g3 = top d3
; asm 1: lwz >g3=int32#10,<d3=stack64#22
; asm 2: lwz >g3=r12,<d3=248(r1)
lwz r12,248(r1)

; qhasm:   g3 &= 255
; asm 1: andi. >g3=int32#10,<g3=int32#10,255
; asm 2: andi. >g3=r12,<g3=r12,255
andi. r12,r12,255

; qhasm:   f4 = 0
; asm 1: li >f4=int32#11,0
; asm 2: li >f4=r13,0
li r13,0

; qhasm:   carry? f1 = f1 + g0
; asm 1: addc >f1=int32#4,<f1=int32#5,<g0=int32#4
; asm 2: addc >f1=r6,<f1=r7,<g0=r6
addc r6,r7,r6

; qhasm:   carry? f2 = f2 + g1 + carry
; asm 1: adde >f2=int32#5,<f2=int32#7,<g1=int32#6
; asm 2: adde >f2=r7,<f2=r9,<g1=r8
adde r7,r9,r8

; qhasm:   carry? f3 = f3 + g2 + carry
; asm 1: adde >f3=int32#6,<f3=int32#9,<g2=int32#8
; asm 2: adde >f3=r8,<f3=r11,<g2=r10
adde r8,r11,r10

; qhasm:          f4 = f4 + g3 + carry
; asm 1: adde >f4=int32#7,<f4=int32#11,<g3=int32#10
; asm 2: adde >f4=r9,<f4=r13,<g3=r12
adde r9,r13,r12

; qhasm:   g0 = 5
; asm 1: li >g0=int32#8,5
; asm 2: li >g0=r10,5
li r10,5

; qhasm:   g1 = 0
; asm 1: li >g1=int32#9,0
; asm 2: li >g1=r11,0
li r11,0

; qhasm:   g2 = 0
; asm 1: li >g2=int32#10,0
; asm 2: li >g2=r12,0
li r12,0

; qhasm:   g3 = 0
; asm 1: li >g3=int32#11,0
; asm 2: li >g3=r13,0
li r13,0

; qhasm:   g4 = -4
; asm 1: li >g4=int32#12,-4
; asm 2: li >g4=r14,-4
li r14,-4

; qhasm:   carry? g0 = g0 + f0
; asm 1: addc >g0=int32#8,<g0=int32#8,<f0=int32#2
; asm 2: addc >g0=r10,<g0=r10,<f0=r4
addc r10,r10,r4

; qhasm:   carry? g1 = g1 + f1 + carry
; asm 1: adde >g1=int32#9,<g1=int32#9,<f1=int32#4
; asm 2: adde >g1=r11,<g1=r11,<f1=r6
adde r11,r11,r6

; qhasm:   carry? g2 = g2 + f2 + carry
; asm 1: adde >g2=int32#10,<g2=int32#10,<f2=int32#5
; asm 2: adde >g2=r12,<g2=r12,<f2=r7
adde r12,r12,r7

; qhasm:   carry? g3 = g3 + f3 + carry
; asm 1: adde >g3=int32#11,<g3=int32#11,<f3=int32#6
; asm 2: adde >g3=r13,<g3=r13,<f3=r8
adde r13,r13,r8

; qhasm:          g4 = g4 + f4 + carry
; asm 1: adde >g4=int32#7,<g4=int32#12,<f4=int32#7
; asm 2: adde >g4=r9,<g4=r14,<f4=r9
adde r9,r14,r9

; qhasm:   f = (int32) g4 >> 16
; asm 1: srawi >f=int32#7,<g4=int32#7,16
; asm 2: srawi >f=r9,<g4=r9,16
srawi r9,r9,16

; qhasm:   f0 &= f
; asm 1: and >f0=int32#2,<f0=int32#2,<f=int32#7
; asm 2: and >f0=r4,<f0=r4,<f=r9
and r4,r4,r9

; qhasm:   g0 &= ~f
; asm 1: andc >g0=int32#8,<g0=int32#8,<f=int32#7
; asm 2: andc >g0=r10,<g0=r10,<f=r9
andc r10,r10,r9

; qhasm:   f0 |= g0
; asm 1: or >f0=int32#2,<f0=int32#2,<g0=int32#8
; asm 2: or >f0=r4,<f0=r4,<g0=r10
or r4,r4,r10

; qhasm:   f1 &= f
; asm 1: and >f1=int32#4,<f1=int32#4,<f=int32#7
; asm 2: and >f1=r6,<f1=r6,<f=r9
and r6,r6,r9

; qhasm:   g1 &= ~f
; asm 1: andc >g1=int32#8,<g1=int32#9,<f=int32#7
; asm 2: andc >g1=r10,<g1=r11,<f=r9
andc r10,r11,r9

; qhasm:   f1 |= g1
; asm 1: or >f1=int32#4,<f1=int32#4,<g1=int32#8
; asm 2: or >f1=r6,<f1=r6,<g1=r10
or r6,r6,r10

; qhasm:   f2 &= f
; asm 1: and >f2=int32#5,<f2=int32#5,<f=int32#7
; asm 2: and >f2=r7,<f2=r7,<f=r9
and r7,r7,r9

; qhasm:   g2 &= ~f
; asm 1: andc >g2=int32#8,<g2=int32#10,<f=int32#7
; asm 2: andc >g2=r10,<g2=r12,<f=r9
andc r10,r12,r9

; qhasm:   f2 |= g2
; asm 1: or >f2=int32#5,<f2=int32#5,<g2=int32#8
; asm 2: or >f2=r7,<f2=r7,<g2=r10
or r7,r7,r10

; qhasm:   f3 &= f
; asm 1: and >f3=int32#6,<f3=int32#6,<f=int32#7
; asm 2: and >f3=r8,<f3=r8,<f=r9
and r8,r8,r9

; qhasm:   g3 &= ~f
; asm 1: andc >g3=int32#7,<g3=int32#11,<f=int32#7
; asm 2: andc >g3=r9,<g3=r13,<f=r9
andc r9,r13,r9

; qhasm:   f3 |= g3
; asm 1: or >f3=int32#6,<f3=int32#6,<g3=int32#7
; asm 2: or >f3=r8,<f3=r8,<g3=r9
or r8,r8,r9

; qhasm:   s0 = *(swapendian uint32 *) s
; asm 1: lwbrx >s0=int32#7,0,<s=int32#3
; asm 2: lwbrx >s0=r9,0,<s=r5
lwbrx r9,0,r5

; qhasm:   s += 4
; asm 1: addi >s=int32#3,<s=int32#3,4
; asm 2: addi >s=r5,<s=r5,4
addi r5,r5,4

; qhasm:   s1 = *(swapendian uint32 *) s
; asm 1: lwbrx >s1=int32#8,0,<s=int32#3
; asm 2: lwbrx >s1=r10,0,<s=r5
lwbrx r10,0,r5

; qhasm:   s += 4
; asm 1: addi >s=int32#3,<s=int32#3,4
; asm 2: addi >s=r5,<s=r5,4
addi r5,r5,4

; qhasm:   s2 = *(swapendian uint32 *) s
; asm 1: lwbrx >s2=int32#9,0,<s=int32#3
; asm 2: lwbrx >s2=r11,0,<s=r5
lwbrx r11,0,r5

; qhasm:   s += 4
; asm 1: addi >s=int32#3,<s=int32#3,4
; asm 2: addi >s=r5,<s=r5,4
addi r5,r5,4

; qhasm:   s3 = *(swapendian uint32 *) s
; asm 1: lwbrx >s3=int32#3,0,<s=int32#3
; asm 2: lwbrx >s3=r5,0,<s=r5
lwbrx r5,0,r5

; qhasm:   carry? f0 = f0 + s0
; asm 1: addc >f0=int32#2,<f0=int32#2,<s0=int32#7
; asm 2: addc >f0=r4,<f0=r4,<s0=r9
addc r4,r4,r9

; qhasm:   carry? f1 = f1 + s1 + carry
; asm 1: adde >f1=int32#4,<f1=int32#4,<s1=int32#8
; asm 2: adde >f1=r6,<f1=r6,<s1=r10
adde r6,r6,r10

; qhasm:   carry? f2 = f2 + s2 + carry
; asm 1: adde >f2=int32#5,<f2=int32#5,<s2=int32#9
; asm 2: adde >f2=r7,<f2=r7,<s2=r11
adde r7,r7,r11

; qhasm:          f3 = f3 + s3 + carry
; asm 1: adde >f3=int32#3,<f3=int32#6,<s3=int32#3
; asm 2: adde >f3=r5,<f3=r8,<s3=r5
adde r5,r8,r5

; qhasm:   *(swapendian uint32 *) out = f0
; asm 1: stwbrx <f0=int32#2,0,<out=int32#1
; asm 2: stwbrx <f0=r4,0,<out=r3
stwbrx r4,0,r3

; qhasm:   out += 4
; asm 1: addi >out=int32#1,<out=int32#1,4
; asm 2: addi >out=r3,<out=r3,4
addi r3,r3,4

; qhasm:   *(swapendian uint32 *) out = f1
; asm 1: stwbrx <f1=int32#4,0,<out=int32#1
; asm 2: stwbrx <f1=r6,0,<out=r3
stwbrx r6,0,r3

; qhasm:   out += 4
; asm 1: addi >out=int32#1,<out=int32#1,4
; asm 2: addi >out=r3,<out=r3,4
addi r3,r3,4

; qhasm:   *(swapendian uint32 *) out = f2
; asm 1: stwbrx <f2=int32#5,0,<out=int32#1
; asm 2: stwbrx <f2=r7,0,<out=r3
stwbrx r7,0,r3

; qhasm:   out += 4
; asm 1: addi >out=int32#1,<out=int32#1,4
; asm 2: addi >out=r3,<out=r3,4
addi r3,r3,4

; qhasm:   *(swapendian uint32 *) out = f3
; asm 1: stwbrx <f3=int32#3,0,<out=int32#1
; asm 2: stwbrx <f3=r5,0,<out=r3
stwbrx r5,0,r3

; qhasm:   i11 = i11_stack
; asm 1: lwz >i11=int32#11,<i11_stack=stack32#1
; asm 2: lwz >i11=r13,<i11_stack=0(r1)
lwz r13,0(r1)

; qhasm:   i12 = i12_stack
; asm 1: lwz >i12=int32#12,<i12_stack=stack32#2
; asm 2: lwz >i12=r14,<i12_stack=4(r1)
lwz r14,4(r1)

; qhasm:   i13 = i13_stack
; asm 1: lwz >i13=int32#13,<i13_stack=stack32#3
; asm 2: lwz >i13=r15,<i13_stack=8(r1)
lwz r15,8(r1)

; qhasm:   i14 = i14_stack
; asm 1: lwz >i14=int32#14,<i14_stack=stack32#4
; asm 2: lwz >i14=r16,<i14_stack=12(r1)
lwz r16,12(r1)

; qhasm:   i15 = i15_stack
; asm 1: lwz >i15=int32#15,<i15_stack=stack32#5
; asm 2: lwz >i15=r17,<i15_stack=16(r1)
lwz r17,16(r1)

; qhasm:   i16 = i16_stack
; asm 1: lwz >i16=int32#16,<i16_stack=stack32#6
; asm 2: lwz >i16=r18,<i16_stack=20(r1)
lwz r18,20(r1)

; qhasm:   i17 = i17_stack
; asm 1: lwz >i17=int32#17,<i17_stack=stack32#7
; asm 2: lwz >i17=r19,<i17_stack=24(r1)
lwz r19,24(r1)

; qhasm:   i18 = i18_stack
; asm 1: lwz >i18=int32#18,<i18_stack=stack32#8
; asm 2: lwz >i18=r20,<i18_stack=28(r1)
lwz r20,28(r1)

; qhasm:   i19 = i19_stack
; asm 1: lwz >i19=int32#19,<i19_stack=stack32#9
; asm 2: lwz >i19=r21,<i19_stack=32(r1)
lwz r21,32(r1)

; qhasm:   i20 = i20_stack
; asm 1: lwz >i20=int32#20,<i20_stack=stack32#10
; asm 2: lwz >i20=r22,<i20_stack=36(r1)
lwz r22,36(r1)

; qhasm:   i21 = i21_stack
; asm 1: lwz >i21=int32#21,<i21_stack=stack32#11
; asm 2: lwz >i21=r23,<i21_stack=40(r1)
lwz r23,40(r1)

; qhasm:   i22 = i22_stack
; asm 1: lwz >i22=int32#22,<i22_stack=stack32#12
; asm 2: lwz >i22=r24,<i22_stack=44(r1)
lwz r24,44(r1)

; qhasm:   i23 = i23_stack
; asm 1: lwz >i23=int32#23,<i23_stack=stack32#13
; asm 2: lwz >i23=r25,<i23_stack=48(r1)
lwz r25,48(r1)

; qhasm:   i24 = i24_stack
; asm 1: lwz >i24=int32#24,<i24_stack=stack32#14
; asm 2: lwz >i24=r26,<i24_stack=52(r1)
lwz r26,52(r1)

; qhasm:   i25 = i25_stack
; asm 1: lwz >i25=int32#25,<i25_stack=stack32#15
; asm 2: lwz >i25=r27,<i25_stack=56(r1)
lwz r27,56(r1)

; qhasm:   i26 = i26_stack
; asm 1: lwz >i26=int32#26,<i26_stack=stack32#16
; asm 2: lwz >i26=r28,<i26_stack=60(r1)
lwz r28,60(r1)

; qhasm:   i27 = i27_stack
; asm 1: lwz >i27=int32#27,<i27_stack=stack32#17
; asm 2: lwz >i27=r29,<i27_stack=64(r1)
lwz r29,64(r1)

; qhasm:   i28 = i28_stack
; asm 1: lwz >i28=int32#28,<i28_stack=stack32#18
; asm 2: lwz >i28=r30,<i28_stack=68(r1)
lwz r30,68(r1)

; qhasm:   i29 = i29_stack
; asm 1: lwz >i29=int32#29,<i29_stack=stack32#19
; asm 2: lwz >i29=r31,<i29_stack=72(r1)
lwz r31,72(r1)

; qhasm:   j15 = j15_stack
; asm 1: lfd >j15=float64#15,<j15_stack=stack64#1
; asm 2: lfd >j15=f14,<j15_stack=80(r1)
lfd f14,80(r1)

; qhasm:   j16 = j16_stack
; asm 1: lfd >j16=float64#16,<j16_stack=stack64#2
; asm 2: lfd >j16=f15,<j16_stack=88(r1)
lfd f15,88(r1)

; qhasm:   j17 = j17_stack
; asm 1: lfd >j17=float64#17,<j17_stack=stack64#3
; asm 2: lfd >j17=f16,<j17_stack=96(r1)
lfd f16,96(r1)

; qhasm:   j18 = j18_stack
; asm 1: lfd >j18=float64#18,<j18_stack=stack64#4
; asm 2: lfd >j18=f17,<j18_stack=104(r1)
lfd f17,104(r1)

; qhasm:   j19 = j19_stack
; asm 1: lfd >j19=float64#19,<j19_stack=stack64#5
; asm 2: lfd >j19=f18,<j19_stack=112(r1)
lfd f18,112(r1)

; qhasm:   j20 = j20_stack
; asm 1: lfd >j20=float64#20,<j20_stack=stack64#6
; asm 2: lfd >j20=f19,<j20_stack=120(r1)
lfd f19,120(r1)

; qhasm:   j21 = j21_stack
; asm 1: lfd >j21=float64#21,<j21_stack=stack64#7
; asm 2: lfd >j21=f20,<j21_stack=128(r1)
lfd f20,128(r1)

; qhasm:   j22 = j22_stack
; asm 1: lfd >j22=float64#22,<j22_stack=stack64#8
; asm 2: lfd >j22=f21,<j22_stack=136(r1)
lfd f21,136(r1)

; qhasm:   j23 = j23_stack
; asm 1: lfd >j23=float64#23,<j23_stack=stack64#9
; asm 2: lfd >j23=f22,<j23_stack=144(r1)
lfd f22,144(r1)

; qhasm:   j24 = j24_stack
; asm 1: lfd >j24=float64#24,<j24_stack=stack64#10
; asm 2: lfd >j24=f23,<j24_stack=152(r1)
lfd f23,152(r1)

; qhasm:   j25 = j25_stack
; asm 1: lfd >j25=float64#25,<j25_stack=stack64#11
; asm 2: lfd >j25=f24,<j25_stack=160(r1)
lfd f24,160(r1)

; qhasm:   j26 = j26_stack
; asm 1: lfd >j26=float64#26,<j26_stack=stack64#12
; asm 2: lfd >j26=f25,<j26_stack=168(r1)
lfd f25,168(r1)

; qhasm:   j27 = j27_stack
; asm 1: lfd >j27=float64#27,<j27_stack=stack64#13
; asm 2: lfd >j27=f26,<j27_stack=176(r1)
lfd f26,176(r1)

; qhasm:   j28 = j28_stack
; asm 1: lfd >j28=float64#28,<j28_stack=stack64#14
; asm 2: lfd >j28=f27,<j28_stack=184(r1)
lfd f27,184(r1)

; qhasm:   j29 = j29_stack
; asm 1: lfd >j29=float64#29,<j29_stack=stack64#15
; asm 2: lfd >j29=f28,<j29_stack=192(r1)
lfd f28,192(r1)

; qhasm:   j30 = j30_stack
; asm 1: lfd >j30=float64#30,<j30_stack=stack64#16
; asm 2: lfd >j30=f29,<j30_stack=200(r1)
lfd f29,200(r1)

; qhasm:   j31 = j31_stack
; asm 1: lfd >j31=float64#31,<j31_stack=stack64#17
; asm 2: lfd >j31=f30,<j31_stack=208(r1)
lfd f30,208(r1)

; qhasm:   j32 = j32_stack
; asm 1: lfd >j32=float64#32,<j32_stack=stack64#18
; asm 2: lfd >j32=f31,<j32_stack=216(r1)
lfd f31,216(r1)

; qhasm: leave
addi r1,r1,432
blr