diff -ruw 240402_AIMer/Reference_Implementation/aimer128f/field.c 240402_AIMer.patched/Reference_Implementation/aimer128f/field.c
--- 240402_AIMer/Reference_Implementation/aimer128f/field.c	2024-05-02 05:23:45.361495015 -0500
+++ 240402_AIMer.patched/Reference_Implementation/aimer128f/field.c	2024-05-02 05:23:56.693761578 -0500
@@ -60,6 +60,14 @@
   }
 }
 
+void GF_selfaddmask(GF a, const GF b, uint64_t mask)
+{
+  for (unsigned i = 0; i < AIM2_NUM_WORDS_FIELD; i++)
+  {
+    a[i] ^= b[i] & mask;
+  }
+}
+
 void poly64_mul(uint64_t x0, uint64_t y0, uint64_t *z1, uint64_t *z0)
 {
   const uint64_t C0 = 0x5555555555555555;
@@ -297,9 +305,6 @@
   GF_copy(a, a_);
   for (unsigned i = 0; i < AIM2_NUM_BITS_FIELD; i++)
   {
-    if (GF_getbit(a_, i))
-    {
-      GF_add(c, b[i], c);
-    }
+    GF_selfaddmask(c, b[i], -(uint64_t) GF_getbit(a_, i));
   }
 }
Only in 240402_AIMer.patched/Reference_Implementation/aimer128f: field.c.orig
diff -ruw 240402_AIMer/Reference_Implementation/aimer128s/field.c 240402_AIMer.patched/Reference_Implementation/aimer128s/field.c
--- 240402_AIMer/Reference_Implementation/aimer128s/field.c	2024-05-02 05:23:45.361495015 -0500
+++ 240402_AIMer.patched/Reference_Implementation/aimer128s/field.c	2024-05-02 05:23:56.693761578 -0500
@@ -60,6 +60,14 @@
   }
 }
 
+void GF_selfaddmask(GF a, const GF b, uint64_t mask)
+{
+  for (unsigned i = 0; i < AIM2_NUM_WORDS_FIELD; i++)
+  {
+    a[i] ^= b[i] & mask;
+  }
+}
+
 void poly64_mul(uint64_t x0, uint64_t y0, uint64_t *z1, uint64_t *z0)
 {
   const uint64_t C0 = 0x5555555555555555;
@@ -297,9 +305,6 @@
   GF_copy(a, a_);
   for (unsigned i = 0; i < AIM2_NUM_BITS_FIELD; i++)
   {
-    if (GF_getbit(a_, i))
-    {
-      GF_add(c, b[i], c);
-    }
+    GF_selfaddmask(c, b[i], -(uint64_t) GF_getbit(a_, i));
   }
 }
Only in 240402_AIMer.patched/Reference_Implementation/aimer128s: field.c.orig
diff -ruw 240402_AIMer/Reference_Implementation/aimer192f/field.c 240402_AIMer.patched/Reference_Implementation/aimer192f/field.c
--- 240402_AIMer/Reference_Implementation/aimer192f/field.c	2024-05-02 05:23:45.361495015 -0500
+++ 240402_AIMer.patched/Reference_Implementation/aimer192f/field.c	2024-05-02 05:23:56.693761578 -0500
@@ -60,6 +60,14 @@
   }
 }
 
+void GF_selfaddmask(GF a, const GF b, uint64_t mask)
+{
+  for (unsigned i = 0; i < AIM2_NUM_WORDS_FIELD; i++)
+  {
+    a[i] ^= b[i] & mask;
+  }
+}
+
 void poly64_mul(uint64_t x0, uint64_t y0, uint64_t *z1, uint64_t *z0)
 {
   const uint64_t C0 = 0x5555555555555555;
@@ -347,9 +355,6 @@
   GF_copy(a, a_);
   for (unsigned i = 0; i < AIM2_NUM_BITS_FIELD; i++)
   {
-    if (GF_getbit(a_, i))
-    {
-      GF_add(c, b[i], c);
-    }
+    GF_selfaddmask(c, b[i], -(uint64_t) GF_getbit(a_, i));
   }
 }
Only in 240402_AIMer.patched/Reference_Implementation/aimer192f: field.c.orig
diff -ruw 240402_AIMer/Reference_Implementation/aimer192s/field.c 240402_AIMer.patched/Reference_Implementation/aimer192s/field.c
--- 240402_AIMer/Reference_Implementation/aimer192s/field.c	2024-05-02 05:23:45.361495015 -0500
+++ 240402_AIMer.patched/Reference_Implementation/aimer192s/field.c	2024-05-02 05:23:56.697761671 -0500
@@ -60,6 +60,14 @@
   }
 }
 
+void GF_selfaddmask(GF a, const GF b, uint64_t mask)
+{
+  for (unsigned i = 0; i < AIM2_NUM_WORDS_FIELD; i++)
+  {
+    a[i] ^= b[i] & mask;
+  }
+}
+
 void poly64_mul(uint64_t x0, uint64_t y0, uint64_t *z1, uint64_t *z0)
 {
   const uint64_t C0 = 0x5555555555555555;
@@ -347,9 +355,6 @@
   GF_copy(a, a_);
   for (unsigned i = 0; i < AIM2_NUM_BITS_FIELD; i++)
   {
-    if (GF_getbit(a_, i))
-    {
-      GF_add(c, b[i], c);
-    }
+    GF_selfaddmask(c, b[i], -(uint64_t) GF_getbit(a_, i));
   }
 }
Only in 240402_AIMer.patched/Reference_Implementation/aimer192s: field.c.orig
diff -ruw 240402_AIMer/Reference_Implementation/aimer256f/field.c 240402_AIMer.patched/Reference_Implementation/aimer256f/field.c
--- 240402_AIMer/Reference_Implementation/aimer256f/field.c	2024-05-02 05:23:45.365495109 -0500
+++ 240402_AIMer.patched/Reference_Implementation/aimer256f/field.c	2024-05-02 05:23:56.697761671 -0500
@@ -60,6 +60,14 @@
   }
 }
 
+void GF_selfaddmask(GF a, const GF b, uint64_t mask)
+{
+  for (unsigned i = 0; i < AIM2_NUM_WORDS_FIELD; i++)
+  {
+    a[i] ^= b[i] & mask;
+  }
+}
+
 void poly64_mul(uint64_t x0, uint64_t y0, uint64_t *z1, uint64_t *z0)
 {
   const uint64_t C0 = 0x5555555555555555;
@@ -411,9 +419,6 @@
   GF_copy(a, a_);
   for (unsigned i = 0; i < AIM2_NUM_BITS_FIELD; i++)
   {
-    if (GF_getbit(a_, i))
-    {
-      GF_add(c, b[i], c);
-    }
+    GF_selfaddmask(c, b[i], -(uint64_t) GF_getbit(a_, i));
   }
 }
Only in 240402_AIMer.patched/Reference_Implementation/aimer256f: field.c.orig
diff -ruw 240402_AIMer/Reference_Implementation/aimer256s/field.c 240402_AIMer.patched/Reference_Implementation/aimer256s/field.c
--- 240402_AIMer/Reference_Implementation/aimer256s/field.c	2024-05-02 05:23:45.365495109 -0500
+++ 240402_AIMer.patched/Reference_Implementation/aimer256s/field.c	2024-05-02 05:23:56.697761671 -0500
@@ -60,6 +60,14 @@
   }
 }
 
+void GF_selfaddmask(GF a, const GF b, uint64_t mask)
+{
+  for (unsigned i = 0; i < AIM2_NUM_WORDS_FIELD; i++)
+  {
+    a[i] ^= b[i] & mask;
+  }
+}
+
 void poly64_mul(uint64_t x0, uint64_t y0, uint64_t *z1, uint64_t *z0)
 {
   const uint64_t C0 = 0x5555555555555555;
@@ -411,9 +419,6 @@
   GF_copy(a, a_);
   for (unsigned i = 0; i < AIM2_NUM_BITS_FIELD; i++)
   {
-    if (GF_getbit(a_, i))
-    {
-      GF_add(c, b[i], c);
-    }
+    GF_selfaddmask(c, b[i], -(uint64_t) GF_getbit(a_, i));
   }
 }
Only in 240402_AIMer.patched/Reference_Implementation/aimer256s: field.c.orig
